Meta-iter1 was a scoping iteration — deliverable is the campaign umbrella + sub-iter ledger, not a code change. Phases 2-8 are either rolled into Phase 0+1 (situation, plan) or deliberately N/A (no meta-level measurements or verification beyond 'issues filed + ledger exists'). Phase 5 review is the documented deviation from 'reviews are never skippable': justified because Phase 0's prior-art survey + verification against kernel source IS the review-equivalent rigor (per feedback_review_empirical_over_theoretical), and there's no separate Phase 4 plan to review beyond the ledger. iter2 + iter3 each get a full Phase 5 review on their own. No new memory entry — lessons fall under existing feedback_dev_process (Phase 1 loopback when scoping was wrong) and feedback_characterize_before_change (meta-iter1 = scope + ledger extends naturally). Next: start iter2 Phase 0 (HEVC backend extension via V4L2_CID_STATELESS_HEVC_EXT_SPS_ST_RPS / _LT_RPS). Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
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Meta-iter1 close — campaign scoped, ready for iter2
iter1 of the ampere-kernel-decoders meta-campaign closes 2026-05-16 with consolidated phases 2-8 (rationale below). The campaign is now ready for iter2 (HEVC backend extension) as its first engineering iteration.
Why phases 2-8 are consolidated for meta-iter1
The dev process applies fully to each engineering iteration. Meta-iter1 is a scoping iteration — its deliverable is the campaign umbrella + sub-iteration ledger, not a code change. Treating phases 2-8 as separate artifacts would be ceremony with no substantive content (situation = "we have a campaign now", baseline = "ampere-fourier iter1 numbers carry as reference", plan = "start iter2", review = "of what?", impl = "the issues are filed", verification = "the ledger is in git").
To honour the dev-process discipline without padding:
| Phase | Status for meta-iter1 |
|---|---|
| 0 | done — phase0_findings.md (substrate + prior-art survey + HEVC reclassification) |
| 1 | done — phase1_goal.md (meta-goal + sub-iteration ledger) |
| 2 | rolled into Phase 1's ledger — meta-situation is "we have two parallel sub-iters, each has its own Phase 2"; iter2 + iter3 each do real Phase 2 work |
| 3 | N/A for meta-iter1 — no measurements to take at the meta level; iter2 + iter3 each take their own Phase 3 baselines anchored to ampere-fourier iter1 reference numbers |
| 4 | rolled into Phase 1 — the ledger IS the meta-plan |
| 5 | deliberate skip — per the dev process "reviews are not skippable" rule, this is a deviation. Justification: there's no "plan to review" beyond the ledger structure, and the Phase 0 survey + reclassification was the substantive judgement that would normally be the review target — and it WAS independently sourced (general-purpose subagent's prior-art survey, then verified empirically against kernel source per feedback_review_empirical_over_theoretical). The reviewer-equivalent rigor is in Phase 0, not deferred to a separate Phase 5. iter2 + iter3 each get a full Phase 5 review on their own plans. |
| 6 | done — issues filed (libva-v4l2-request-fourier#3 for HEVC, kernel-agent#12 for VP9), kernel-agent#11 closed with reclassification, campaign repo scaffolded |
| 7 | N/A — nothing to verify beyond "the ledger exists and the issues are filed", both of which are visible in git + gitea |
| 8 | this file |
Memory entry from meta-iter1
No new memory entry needed. The lessons are:
- "Phase 0 prior-art survey can invalidate the campaign's initial scoping" — already a corollary of
feedback_dev_process("if baseline reveals the Phase 1 metric was tracking the wrong thing → loopback Phase 1"); the meta-campaign IS that loopback, applied at the scoping level. - "iter1 = characterize-and-baseline" from
feedback_characterize_before_changeextends naturally: for a meta-campaign, the equivalent is "meta-iter1 = scope + ledger, real engineering starts iter2."
If iter2 produces a substantive process lesson worth memorializing, that goes in iter2's Phase 8.
Next step
Start iter2 (HEVC backend): extend libva-v4l2-request-fourier to populate V4L2_CID_STATELESS_HEVC_EXT_SPS_ST_RPS and _LT_RPS for VDPU381 HEVC. Sub-iter Phase 0 entry begins in phase0_findings_iter2.md.