# Phase 2 close — VP9 backend compiles clean Date: 2026-05-17 ~02:55. Phase 2 (`Implement rkvdec-vdpu381-vp9.c backend`) closed at the "compiles clean against 7.0.0-rc3 ARM64 kernel" milestone. ## Three commits on `boltzmann:~/src/linux-rockchip` branch `vp9-enablement-iter1` | Commit | Subject | LoC | |---|---|---| | `47431635801d` | media: rkvdec: Add VP9 register-struct definitions for VDPU381 variant | +238 | | `da8482271938` | media: rkvdec: Add shared VP9 codec-spec helpers in rkvdec-vp9-common.h | +511 | | `71cc0d96d212` | media: rkvdec: Add VP9 backend for VDPU381 variant (RK3588) | +513 | Total: +1262 lines across 4 files. The vdpu381-hevc reference (Casanova v7.0) is 639 lines; Phase 1 estimated VP9 backend at 550-700; we landed at 513 backend + 511 common-header = within range. ## Build verification ``` boltzmann$ cd ~/src/linux-rockchip boltzmann$ PATH=/home/mfritsche/bin:$PATH make -j$(nproc) \ ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- \ drivers/media/platform/rockchip/rkvdec/ CC [M] drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-vp9.o LD [M] drivers/media/platform/rockchip/rkvdec/rockchip-vdec.o ``` Zero errors, zero warnings on the new file after fixing two field-name typos caught by the compiler: | Bug | Fix | |---|---| | Used BSP-style `reg128_rlc_base` / `reg130_decout_base` / `reg131_colmv_cur_base` for `struct rkvdec_vdpu381_regs_common_addr` fields | Mainline naming is plain `rlc_base` / `decout_base` / `colmv_cur_base`; corrected | | Unused variable `i` in `vdpu381_config_vp9_regs` | Removed | These both are pre-flash compiler-caught bugs of exactly the kind Janet predicted in v2 review re. namespace bridging — the legacy `regs->common.reg02.dec_mode` style is muscle-memory from reading the legacy file. Corrected without regression. ## What's NOT yet correct (deferred TODOs in the backend file) 5 `TODO Phase 2.1` markers in `vdpu381_config_vp9_regs` for fields that compile fine but aren't yet packed correctly. These will be needed for first-light decode but the skeleton is structurally correct: 1. RCB address setup (`common_addr.rcb_base[10]` — currently NULL; needs `vdpu381_set_rcb_addrs` equivalent to HEVC path) 2. Segmentation register packing per `segid 0..7` (`reg067_074_segid[]` — currently zero-init; needs `config_seg_registers` port) 3. Loop-filter `ref_deltas[0..3]` bit-pack into `reg094_ref_deltas_lastframe.ref_deltas_lastframe` (28-bit field combining 4× 7-bit deltas) 4. Loop-filter `mode_deltas[0..1]` bit-pack into `reg075_last_frame_info.mode_deltas_lastframe` (14-bit field) 5. Probability storage rotation: `reg160_delta_prob_base`, `reg162_last_prob_base`, `reg172_update_prob_wr_base` (per BSP `Vdpu382Vp9dCtx_t::prob_idx` cycle logic) ## Open questions surfaced during Phase 2 implementation | Q | Question | Status | |---|---|---| | C-1 | `reg103_frame_flags` extra bits (`prob_update_en`, `txfmmode_rfsh_en`, etc.) — required for first decode? | Hypothesis: only the most-obviously-needed bits set (intra_only, refresh_en, allow_high_precision_mv, interp_filter_switch_en); others left zero — verify empirically | | C-2 | `reg160_delta_prob_base` and `reg162_last_prob_base` — new DMA allocations or alias existing? | Hypothesis: alias `priv_tbl.probs` regions; verify against BSP `vdpu382_set_vp9d_buffer` equivalent | | C-3 | `reg028.vp9_rd_prob_idx`/`vp9_wr_prob_idx` first-frame values? | Currently both = 0 in skeleton. BSP rotates; will need iteration | | C-4 | RCB write-out — does mainline `rkvdec_setup_rcb` already populate `common_addr.rcb_base[]`, or does each backend need to wire it? | HEVC backend (`rkvdec-vdpu381-hevc.c:362-374`) writes RCB addrs explicitly. Mirror that pattern in VP9 backend | | C-5 | `reg032_timeout_threshold` — set to RKVDEC_TIMEOUT_4K (0x2cfffff) for 4K-max VP9? | Yes; add to register setup | ## Push status `git push gitea vp9-enablement-iter1` from boltzmann is hanging (ssh timeout). Commits are safely on boltzmann disk in branch `vp9-enablement-iter1`. Will retry push next session. Branch will eventually land at `git.reauktion.de/marfrit/linux-rk3588-marfrit:vp9-enablement-iter1`. ## What Phase 3 needs (next-session entry point) 1. **Retry push** to gitea from boltzmann to back up the work off-disk. 2. **Implement the 5 TODOs** in `vdpu381_config_vp9_regs`. Each is a 5-15 line bit-packing task referencing the BSP `hal_vp9d_vdpu382.c` source. Expect ~100-200 LoC delta. 3. **Build module + backup ampere's current rockchip-vdec.ko** per [feedback_backup_before_module_replace](../../.claude/projects/-home-mfritsche-src-fresnel-fourier/memory/feedback_backup_before_module_replace.md) before install. 4. **Install + modprobe cycle** — `scp boltzmann:~/src/linux-rockchip/drivers/media/platform/rockchip/rkvdec/rockchip-vdec.ko ampere:/lib/modules/7.0.0-rc3-devices+/kernel/drivers/media/platform/rockchip/rkvdec/`, then `ssh ampere "sudo modprobe -r rockchip-vdec && sudo modprobe rockchip-vdec"`. 5. **Sanity enumeration**: `v4l2-ctl --device=/dev/video0 --list-formats-out` should show VP9F alongside H264_SLICE and HEVC_SLICE. 6. **Pre-flight diagnostic**: instrument `vdpu381_irq_handler` with `pr_warn("vp9 irq status=0x%x\n", status)` for first 5 decodes (per Janet Amendment C) to verify IRQ status bit semantics before counting on `VDPU381_STA_INT_DEC_RDY_STA = BIT(2)`. 7. **First decode attempt**: `LIBVA_DRIVER_NAME=v4l2_request ffmpeg -hwaccel vaapi -i bbb_30s_720p.vp9.webm -vf hwdownload,format=nv12 -frames:v 5 -f rawvideo /tmp/hw-vp9.nv12`. Watch dmesg for IRQ status. Most likely outcome on first attempt with TODO #1-5 unresolved: watchdog 2-second timeout (no decode complete IRQ). 8. **Iterate** on the TODOs until first-light. Then SW byte-compare on a non-fade-in frame index. ## Persistence checkpoint - **Campaign repo**: 4 commits at `git.reauktion.de/claude-noether/ampere-vp9-enablement` master (phase0, phase1, phase1_v2, phase1_v3_amendment, phase2_field_mapping, this doc). - **Kernel branch**: 3 commits on `boltzmann:~/src/linux-rockchip:vp9-enablement-iter1` (not yet pushed to gitea due to ssh timeout). - **Module artifact**: `boltzmann:~/src/linux-rockchip/drivers/media/platform/rockchip/rkvdec/rockchip-vdec.ko` (compiled, NOT yet installed on ampere). - **No ampere changes**: ampere is still on sibling-campaign close state (HEVC bit-perfect, iter3+iter4 kernel patches in modules). - **Rockchip BSP reference**: `boltzmann:~/src/rockchip-bsp/{mpp,rk-kernel-6.6}` — clones retained for Phase 3 cross-reference of `Vdpu382Vp9dCtx_t::prob_idx` rotation and RCB setup. Phase 2 closes here. Substantial code artifact in hand; remaining bit-level field translation is well-scoped (5 TODOs, all with BSP reference locations identified) for the next session.