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Cycle 4 (LPF wd=8) closure: M1=100%, R=0.34, M4=+4.1%, PASS

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Fourth daedalus-fourier kernel — VP9 8-tap inner loop filter wd=8
h_8_8 variant. Width extension of cycle 2's wd=4; completes VP9
inner-edge LPF coverage. Full cycle Phase 1-7 + M4'''' in one
combined go (cycle compressed since incremental from cycle 2).

Phase 5 review explicitly skipped (incremental ~30-line shader
delta from cycle 2 + same geometry + cycle-2 RED-pattern checks
still apply). Flagged in docs/k4_lpf8_phase4_7.md per dev_process.md
"Skipping phases is a deliberate choice that should be flagged."

Phase 6 v1 first-light: M1'''' 100.0000% bit-exact (65536/65536)
first try. Shaderdb shows 231 inst, 4 hardware threads, 0 spills,
27 max-temps, 48 uniforms — compiler at the latency-hiding ceiling.

Performance:

  M3'''' NEON (single-core)  52.382 Medge/s
  M2'''' QPU isolation       17.847 Medge/s
  R''''                      0.341  → ORANGE band
  30fps floor margin         9.2x (isolation), 20.3x (mixed)

M4'''' concurrent matrix:

  NEON 4-core                37.823 Medge/s  <- baseline
  QPU only                   14.867 Medge/s
  MIXED NEON-3 + QPU         39.389 Medge/s  <- +4.1% PASS

Verdict: YELLOW-via-M4'''' PASS. Deploy wd=8 LPF on QPU alongside
cycle 2 wd=4. Combined VP9 inner-edge LPF coverage now complete.

Cross-cycle LPF comparison:

  | | wd=4 (k2) | wd=8 (k4) |
  | M3 NEON     | 48.3      | 52.4      |
  | M2 QPU iso  | 19.6      | 17.8      |
  | R iso       | 0.41      | 0.34      |
  | M4 delta    | +6.9%     | +4.1%     |
  | 30fps mixed | 7.2x      | 20.3x     |
  | Verdict     | GO QPU    | GO QPU    |

NEW finding (Phase 9 lesson): NEON gets faster per edge as filter
width grows (20.7 → 19.1 ns wd=4 → wd=8). The relative QPU loss
grows with width. wd=16 would probably flip negative based on the
trend line.

Deployment recipe with cycle 4:

  IDCT 8x8 (k1)     -> QPU   (R=0.92, +7% mixed)
  LPF wd=4 (k2)     -> QPU   (R=0.41, +7% mixed)
  LPF wd=8 (k4)     -> QPU   (R=0.34, +4% mixed)
  MC 8h (k3)        -> CPU   (R=0.067, -19% mixed)
  Entropy           -> CPU   (structural)

VP9 inner-edge LPF coverage complete. Project continues to higgs
deployment plumbing or further kernels per user direction.

New artifacts:
- src/v3d_lpf_h_8_8.comp                 — GLSL shader
- tests/vp9_lpf8_ref.c                   — standalone C ref
- tests/bench_neon_lpf8.c                — M1+M3 bench
- tests/bench_v3d_lpf8.c                 — M1+M2 bench
- tests/bench_concurrent_lpf8.c          — M4 pthread bench
- docs/k4_lpf8_phase1_3.md + phase4_7.md — combined cycle docs

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
This commit is contained in:
Markus Fritsche
2026-05-18 12:56:25 +00:00
parent 356e446a49
commit 85feba4087
8 changed files with 1106 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files
CMakeLists.txt
+38 -1
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@@ -98,6 +98,14 @@ add_executable(bench_neon_mc
${FFC_MC_SOURCES} ${FFC_MC_SOURCES}
) )
target_compile_options(bench_neon_mc PRIVATE -O3 -march=armv8-a+simd) target_compile_options(bench_neon_mc PRIVATE -O3 -march=armv8-a+simd)
# Cycle 4 — VP9 LPF wd=8 NEON baseline (same vendored .S as cycle 2).
add_executable(bench_neon_lpf8
tests/bench_neon_lpf8.c
tests/vp9_lpf8_ref.c
${FFASM_LPF_SOURCES}
)
target_compile_options(bench_neon_lpf8 PRIVATE -O3 -march=armv8-a+simd)
# bench_neon_idct doesn't need vulkan/drm — pure CPU baseline. # bench_neon_idct doesn't need vulkan/drm — pure CPU baseline.
# ---- Vulkan dispatch-overhead microbench (next chunk) ---------------------- # ---- Vulkan dispatch-overhead microbench (next chunk) ----------------------
@@ -158,7 +166,18 @@ if (DAEDALUS_BUILD_VULKAN)
VERBATIM VERBATIM
) )
add_custom_target(daedalus_shaders ALL DEPENDS ${NOOP_SPV} ${IDCT8_SPV} ${LPF_SPV} ${MC_SPV}) set(LPF8_SPV ${CMAKE_BINARY_DIR}/v3d_lpf_h_8_8.spv)
add_custom_command(
OUTPUT ${LPF8_SPV}
COMMAND ${GLSLANG_VALIDATOR} -V --target-env vulkan1.3
-o ${LPF8_SPV}
${CMAKE_SOURCE_DIR}/src/v3d_lpf_h_8_8.comp
DEPENDS ${CMAKE_SOURCE_DIR}/src/v3d_lpf_h_8_8.comp
COMMENT "glslang: v3d_lpf_h_8_8.comp -> v3d_lpf_h_8_8.spv"
VERBATIM
)
add_custom_target(daedalus_shaders ALL DEPENDS ${NOOP_SPV} ${IDCT8_SPV} ${LPF_SPV} ${MC_SPV} ${LPF8_SPV})
# v3d_runner — reusable Vulkan plumbing. # v3d_runner — reusable Vulkan plumbing.
add_library(v3d_runner STATIC src/v3d_runner.c) add_library(v3d_runner STATIC src/v3d_runner.c)
@@ -197,6 +216,15 @@ if (DAEDALUS_BUILD_VULKAN)
target_link_libraries(bench_v3d_mc PRIVATE v3d_runner Vulkan::Vulkan) target_link_libraries(bench_v3d_mc PRIVATE v3d_runner Vulkan::Vulkan)
target_compile_options(bench_v3d_mc PRIVATE -O2) target_compile_options(bench_v3d_mc PRIVATE -O2)
# Cycle 4 — QPU LPF wd=8 bench.
add_executable(bench_v3d_lpf8
tests/bench_v3d_lpf8.c
tests/vp9_lpf8_ref.c
)
add_dependencies(bench_v3d_lpf8 daedalus_shaders)
target_link_libraries(bench_v3d_lpf8 PRIVATE v3d_runner Vulkan::Vulkan)
target_compile_options(bench_v3d_lpf8 PRIVATE -O2)
# M4 — concurrent CPU(NEON) + QPU bench. Links the FFmpeg NEON # M4 — concurrent CPU(NEON) + QPU bench. Links the FFmpeg NEON
# snapshot so we can run real NEON kernels on pinned CPU cores # snapshot so we can run real NEON kernels on pinned CPU cores
# while the QPU runs its dispatch loop concurrently. # while the QPU runs its dispatch loop concurrently.
@@ -226,6 +254,15 @@ if (DAEDALUS_BUILD_VULKAN)
add_dependencies(bench_concurrent_mc daedalus_shaders) add_dependencies(bench_concurrent_mc daedalus_shaders)
target_link_libraries(bench_concurrent_mc PRIVATE v3d_runner Vulkan::Vulkan pthread) target_link_libraries(bench_concurrent_mc PRIVATE v3d_runner Vulkan::Vulkan pthread)
target_compile_options(bench_concurrent_mc PRIVATE -O3 -march=armv8-a+simd) target_compile_options(bench_concurrent_mc PRIVATE -O3 -march=armv8-a+simd)
# Cycle 4 M4'''' — concurrent LPF wd=8.
add_executable(bench_concurrent_lpf8
tests/bench_concurrent_lpf8.c
${FFASM_LPF_SOURCES}
)
add_dependencies(bench_concurrent_lpf8 daedalus_shaders)
target_link_libraries(bench_concurrent_lpf8 PRIVATE v3d_runner Vulkan::Vulkan pthread)
target_compile_options(bench_concurrent_lpf8 PRIVATE -O3 -march=armv8-a+simd)
endif() endif()
# ---- Summary ---------------------------------------------------------------- # ---- Summary ----------------------------------------------------------------
docs/k4_lpf8_phase1_3.md
+68
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@@ -0,0 +1,68 @@
---
cycle: 4
phases: 1-3 (combined doc — straight extension of cycle 2)
status: phase 3 in progress
date_opened: 2026-05-18
parent_cycle: k3_mc_phase7.md
target_kernel: VP9 loop filter wd=8 inner-edge horizontal (h_8_8)
---
# Cycle 4, Phases 1-3 — LPF wd=8
Compact combined doc — cycle 4 is a *width extension* of cycle 2
(same kernel family, same shape, same NEON file).
## Phase 1 — goal
**Kernel**: VP9 loop filter, 8-tap inner-edge variant (wd=8), horizontal
direction, 8-pixel edge. libavcodec symbol `ff_vp9_loop_filter_h_8_8_neon`
(already in vendored `vp9lpf_neon.S`).
**Why this kernel**: completes VP9 LPF coverage alongside cycle 2's
wd=4. The wd=8 path adds the `flat8in` test (6 abs comparisons) and a
6-pixel "flat region" write path — meaningfully more conditional
branches than wd=4 within the same kernel family.
**Measurable success** (cycle-4 numbering, `''''` superscript):
| ID | Measurement | Gate |
|---|---|---|
| M1'''' | Bit-exact vs C reference | 100.0000 % |
| M2'''' | QPU throughput Medge/s | recorded |
| M3'''' | NEON `ff_vp9_loop_filter_h_8_8_neon` Medge/s | recorded |
| M4'''' | Mixed NEON-3 + QPU vs pure NEON-4 (Medge/s) | recorded if YELLOW |
Same R bands + 30fps-floor calibration as cycles 2/3.
**Predicted R''''**: 0.3–0.5. Cycle 2 LPF wd=4 hit R=0.41; wd=8 adds
~20 % more conditional logic (flat8in test) and additional writes
when flat8in passes. Likely modestly worse R than wd=4. The 6-write
flat8in path under SIMD divergence may dominate.
## Phase 2 — situation
C reference: `external/ffmpeg-snapshot/libavcodec/vp9dsp_template.c`,
the same `loop_filter()` function (lines 1780-1898) used in cycle 2
but invoked with wd=8 via the `lf_8_fn(h, 8, stride, 1)` macro
instantiation. The wd=8 path activates the `if (wd >= 8 && flat8in)`
branch.
NEON reference: already vendored at
`external/ffmpeg-snapshot/libavcodec/aarch64/vp9lpf_neon.S`,
symbol `ff_vp9_loop_filter_h_8_8_neon`. Same calling convention
as wd=4: `(uint8_t *dst, ptrdiff_t stride, int E, int I, int H)`.
No new vendored sources needed.
**Workload model per edge (worst case, flat8in passes):**
- 8 rows × 6 written + 2 unwritten = 48 writes per edge (vs wd=4's 16-32)
- 8 rows × 8 reads = 64 reads (same as wd=4)
- ~12 abs+compares per row × 8 = ~96 per edge (vs wd=4's ~50)
Memory traffic similar to cycle 2 (~80-110 bytes per edge).
Compute moderately higher (more conditional branches + more writes
when flat8in fires).
## Phase 3 — NEON M3'''' baseline
(captured below after build + run)
docs/k4_lpf8_phase4_7.md
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@@ -0,0 +1,173 @@
---
cycle: 4
phases: 4-7 (combined)
status: in_progress
date_opened: 2026-05-18
parent: k4_lpf8_phase1_3.md
template: k2_deblock_phase4.md (direct adaptation)
---
# Cycle 4, Phases 4-7 — LPF wd=8
Compact — straight extension of cycle 2 LPF. Phase 4 plan inherits
all of cycle-2's geometry/contracts unchanged; only the per-thread
algorithm changes (adds flat8in branch).
## Phase 4 — plan
**Geometry**: identical to cycle 2 LPF (256 invocations/WG, 2 edges
per subgroup, 8 lanes per edge, 32 edges per WG, oob early-return
safe).
**SSBO bindings**: identical to cycle 2 (meta uvec4, dst uint8_t).
**Per-thread algorithm** — extends cycle 2 with flat8in:
```glsl
// ... same lane/edge decomposition, base/E/I/H load, p3..q3 reads,
// fm test, !fm early return as cycle 2 ...
bool flat8in = abs(p3-p0) <= 1 && abs(p2-p0) <= 1 &&
abs(p1-p0) <= 1 && abs(q1-q0) <= 1 &&
abs(q2-q0) <= 1 && abs(q3-q0) <= 1;
if (flat8in) {
/* 6-write flat-region filter */
u_dst.dst[base-3u] = uint8_t((p3+p3+p3 + 2*p2 + p1+p0+q0 + 4) >> 3);
u_dst.dst[base-2u] = uint8_t((p3+p3+p2 + 2*p1 + p0+q0+q1 + 4) >> 3);
u_dst.dst[base-1u] = uint8_t((p3+p2+p1 + 2*p0 + q0+q1+q2 + 4) >> 3);
u_dst.dst[base+0u] = uint8_t((p2+p1+p0 + 2*q0 + q1+q2+q3 + 4) >> 3);
u_dst.dst[base+1u] = uint8_t((p1+p0+q0 + 2*q1 + q2+q3+q3 + 4) >> 3);
u_dst.dst[base+2u] = uint8_t((p0+q0+q1 + 2*q2 + q3+q3+q3 + 4) >> 3);
} else {
/* same hev/no-hev paths as cycle 2 */
bool hev = abs(p1-p0) > H || abs(q1-q0) > H;
if (hev) { /* 2-write */ }
else { /* 4-write */ }
}
```
**Race safety**: flat8in path writes at `base-3..base+2` = 6
contiguous bytes per row. **Updated contract** vs cycle 2:
`dst_stride_u8 ≥ 6` (vs cycle 2's `≥ 4`). Bench uses stride=8,
satisfies. Phase 6 MUST add `assert(dst_stride_u8 >= 6)`.
**Predicted R''''**: 0.3–0.5 (similar to wd=4's 0.41). The flat8in
write-on-pass path has 50 % more writes than wd=4's no-hev path,
but if flat8in passes rarely under random distributions, it's a
small perturbation.
## Phase 5 — review (skipped — incremental extension)
Cycle-2's phase5 review remains the relevant outside-look. The
specific delta from cycle 2 to cycle 4:
- Added flat8in branch + 6 writes
- Stride contract relaxed-tightened from ≥4 to ≥6
- Same geometry, same SSBOs, same race-safety pattern
The cycle-2 review's two RED-pattern checks (write race, barrier UB)
remain satisfied because the geometry is unchanged. The new
arithmetic is mechanically transcribed from `vp9_lpf8_ref.c` —
risk of orientation/arithmetic bug is concrete but contained; M1''''
is the immediate gate.
**Justification for skipping fresh-context review**: cycle 4 changes
~30 lines of one shader and inherits everything else from cycle 2.
Per dev_process.md "Skipping phases is a deliberate choice that
should be flagged, not a default" — flagging here. If M1'''' fails
on first run, restart with full Phase 5'''' review.
## Phase 6 — implementation
(executed below — `src/v3d_lpf_h_8_8.comp` + `tests/bench_v3d_lpf8.c`)
## Phase 7 — verification
### v1 first-light
```
=== v3d LPF h_8_8 bench ===
=== M1'''': QPU vs C bit-exact ===
edges bit-exact: 65536 / 65536 (100.0000 %)
=== M2'''': QPU throughput ===
per-edge = 56.0 ns
per-dispatch = 3672.1 us
M2'''' = 17.847 Medge/s
R'''' = 0.341 → ORANGE band
30fps@1080p floor: 9.2x margin (isolation)
```
shaderdb: **231 inst, 4 threads, 0 spills, 27 max-temps, 48 uniforms.**
The 4-thread result is the meaningful one — compiler delivered. The
wd=8 kernel runs at the latency-hiding ceiling from v1.
### M4'''' concurrent (8s windows)
| Config | Medge/s | vs NEON-4 | 30fps margin |
|---|---|---|---|
| **NEON 4-core** | **37.823** | baseline | 19.5× |
| QPU only | 14.867 | — | 7.7× |
| **MIXED NEON-3 + QPU** | **39.389** | **+4.1 %** | 20.3× |
**M4'''' PASSES**. The freed-core pattern from cycles 1+2 holds for
wd=8 — smaller delta than wd=4 (+4.1 % vs +6.9 %) but still positive.
The larger conditional logic (flat8in path) dilutes per-edge QPU
contribution under contention (3.98 vs cycle-2's 4.00 — basically
same), and NEON-4 baseline is higher (37.8 vs cycle-2's 33.7) because
the per-edge NEON cost is slightly lower for wd=8 (19.1 vs cycle-2's
20.7 ns), so the relative gain shrinks.
### Cross-cycle LPF comparison
| | k2 wd=4 | k4 wd=8 |
|---|---|---|
| M3 NEON (Medge/s) | 48.285 | 52.382 |
| M2 QPU isolation | 19.645 | 17.847 |
| R isolation | 0.41 | 0.34 |
| NEON-4 (Medge/s) | 33.726 | 37.823 |
| Mixed N-3+QPU | 36.049 | 39.389 |
| M4 delta | **+6.9 %** | **+4.1 %** |
| 30fps margin (mixed) | 7.2× | 20.3× |
| Verdict | GO QPU | GO QPU |
### Decision per Phase 1 rules + 30fps floor
| Rule | Result | Status |
|---|---|---|
| M1'''' bit-exact | 100.0000 % | ✓ PASS |
| R'''' = M2''''/M3'''' | 0.341 (ORANGE) | does not auto-close |
| M4'''' > pure NEON-4 | +4.1 % | ✓ PASS gate |
| 30fps@1080p floor | 20.3× mixed | ✓ PASS user-facing |
**Verdict: YELLOW-via-M4'''' PASS. Deploy wd=8 LPF on QPU,
alongside cycle-2 wd=4.** Combined VP9 LPF coverage = wd=4 + wd=8
on QPU.
### Phase 9 lessons
1. Width extensions of a known-working kernel (wd=4 → wd=8) inherit
the pattern reliably. v1 first-light hit M1'''' = 100 % first try
on a 30-line shader delta. No iteration needed.
2. **Phase 5 review can be skipped for incremental extensions** —
when the delta is < ~30 lines and the cycle-2 review's pattern
coverage still applies. Flagged explicitly in §"Phase 5 — review
(skipped)". If M1 had failed, restart with full review. Cycle 5+
should restore mandatory review for non-incremental work.
3. NEON gets faster per edge as filter width grows (20.7 → 19.1 ns
wd=4 → wd=8). The NEON implementation is heavily optimised; the
relative QPU loss grows with kernel width. Cycle 5 wd=16 would
probably show further R degradation.
4. M4 delta is the gating metric for ORANGE-band kernels. The gap
from cycle-2 +6.9 % to cycle-4 +4.1 % indicates "wd=8 is borderline
useful on QPU; wd=16 may flip negative."
### Leaves open
- LPF wd=16 (cycle 5 if VP9 coverage requires it; likely RED based on
the trend line)
- Vertical variants of both wd=4 and wd=8 (different memory pattern)
- CDEF / loop restoration (AV1 kernels)
- Phase 8 deployment plumbing (libva-v4l2-request-fourier integration)
src/v3d_lpf_h_8_8.comp
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// daedalus-fourier cycle 4 — VP9 8-tap inner LPF, wd=8, h direction,
// 8-pixel edge. V3D 7.1 via Mesa v3dv.
//
// Extension of cycle 2's wd=4 kernel: adds flat8in test + 6-write
// flat-region path. Same lane/edge geometry (32 edges/WG, 8 lanes
// per edge, no barrier, no shared mem).
//
// Contracts (per k4_lpf8_phase4_7.md):
// - meta[i].x: dst_off (≥ 4 for cycle-2 reasons; >= 3 strictly here
// for the -3 read, but ≥ 4 keeps invariant with cycle 2)
// - **dst_stride_u8 ≥ 6** (cycle 4 update: flat8in path writes
// 6 contiguous bytes per row at base-3..base+2)
//
// License: BSD-2-Clause.
#version 450
#extension GL_EXT_shader_8bit_storage : require
#extension GL_EXT_shader_explicit_arithmetic_types : require
layout(local_size_x = 256, local_size_y = 1, local_size_z = 1) in;
layout(binding = 0) readonly buffer Meta { uvec4 meta[]; } u_meta;
layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst;
layout(push_constant) uniform PC {
uint n_edges;
uint blocks_per_row; /* unused */
uint dst_stride_u8;
uint _pad;
} pc;
void main()
{
uint gid = gl_GlobalInvocationID.x;
uint wg_id = gid / 256u;
uint lane_in_wg = gid & 255u;
uint sg_in_wg = lane_in_wg >> 4;
uint lane_in_sg = lane_in_wg & 15u;
uint edge_slot = lane_in_sg >> 3;
uint row = lane_in_sg & 7u;
uint edge_local = sg_in_wg * 2u + edge_slot;
uint edge_idx = wg_id * 32u + edge_local;
if (edge_idx >= pc.n_edges) return;
uvec4 m = u_meta.meta[edge_idx];
uint base = m.x + row * pc.dst_stride_u8;
int E = int(m.y), I = int(m.z), H = int(m.w);
int p3 = int(u_dst.dst[base - 4u]);
int p2 = int(u_dst.dst[base - 3u]);
int p1 = int(u_dst.dst[base - 2u]);
int p0 = int(u_dst.dst[base - 1u]);
int q0 = int(u_dst.dst[base + 0u]);
int q1 = int(u_dst.dst[base + 1u]);
int q2 = int(u_dst.dst[base + 2u]);
int q3 = int(u_dst.dst[base + 3u]);
bool fm = abs(p3-p2) <= I && abs(p2-p1) <= I &&
abs(p1-p0) <= I && abs(q1-q0) <= I &&
abs(q2-q1) <= I && abs(q3-q2) <= I &&
abs(p0-q0)*2 + (abs(p1-q1) >> 1) <= E;
if (!fm) return;
/* F = 1 << (BIT_DEPTH - 8) = 1 for 8-bit pixels. */
bool flat8in = abs(p3-p0) <= 1 && abs(p2-p0) <= 1 &&
abs(p1-p0) <= 1 && abs(q1-q0) <= 1 &&
abs(q2-q0) <= 1 && abs(q3-q0) <= 1;
if (flat8in) {
/* wd=8 inner-flat filter — 8-pixel-input, 6 outputs. Each
* output is a weighted average; rounding bias +4, >>3. */
u_dst.dst[base - 3u] = uint8_t((p3+p3+p3 + 2*p2 + p1+p0+q0 + 4) >> 3);
u_dst.dst[base - 2u] = uint8_t((p3+p3+p2 + 2*p1 + p0+q0+q1 + 4) >> 3);
u_dst.dst[base - 1u] = uint8_t((p3+p2+p1 + 2*p0 + q0+q1+q2 + 4) >> 3);
u_dst.dst[base + 0u] = uint8_t((p2+p1+p0 + 2*q0 + q1+q2+q3 + 4) >> 3);
u_dst.dst[base + 1u] = uint8_t((p1+p0+q0 + 2*q1 + q2+q3+q3 + 4) >> 3);
u_dst.dst[base + 2u] = uint8_t((p0+q0+q1 + 2*q2 + q3+q3+q3 + 4) >> 3);
} else {
bool hev = abs(p1-p0) > H || abs(q1-q0) > H;
if (hev) {
int f = clamp(p1 - q1, -128, 127);
f = clamp(3*(q0-p0) + f, -128, 127);
int f1 = min(f + 4, 127) >> 3;
int f2 = min(f + 3, 127) >> 3;
u_dst.dst[base - 1u] = uint8_t(clamp(p0 + f2, 0, 255));
u_dst.dst[base + 0u] = uint8_t(clamp(q0 - f1, 0, 255));
} else {
int f = clamp(3*(q0-p0), -128, 127);
int f1 = min(f + 4, 127) >> 3;
int f2 = min(f + 3, 127) >> 3;
u_dst.dst[base - 1u] = uint8_t(clamp(p0 + f2, 0, 255));
u_dst.dst[base + 0u] = uint8_t(clamp(q0 - f1, 0, 255));
int fp = (f1 + 1) >> 1;
u_dst.dst[base - 2u] = uint8_t(clamp(p1 + fp, 0, 255));
u_dst.dst[base + 1u] = uint8_t(clamp(q1 - fp, 0, 255));
}
}
}
tests/bench_concurrent_lpf8.c
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/*
* Cycle 2 M4'''' — concurrent CPU(NEON LPF) + QPU(V3D LPF) throughput.
*
* Same pthread/barrier/timer pattern as bench_concurrent.c, but the
* NEON worker calls ff_vp9_loop_filter_h_8_8_neon (per edge) and the
* QPU worker dispatches v3d_lpf_h_8_8.spv.
*
* License: BSD-2-Clause; links FFmpeg NEON snapshot (LGPL-2.1+).
*/
#define _GNU_SOURCE
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <string.h>
#include <stddef.h>
#include <time.h>
#include <getopt.h>
#include <pthread.h>
#include <sched.h>
#include <assert.h>
#include <vulkan/vulkan.h>
#include "v3d_runner.h"
extern void ff_vp9_loop_filter_h_8_8_neon(
uint8_t *dst, ptrdiff_t stride, int E, int I, int H);
/* --- RNG / edge gen (mirrors bench_neon_lpf.c) ------------------- */
#define EDGE_STRIDE 8
#define EDGE_BYTES 64
static inline uint64_t xs_step(uint64_t *s) {
uint64_t x = *s; x ^= x << 13; x ^= x >> 7; x ^= x << 17; return *s = x;
}
static uint64_t xs_init(uint64_t s) { return s ? s : 0xa57edbeef5717ULL; }
static void gen_edge_pixels(uint8_t *buf, uint64_t *s) {
int a = (int)(xs_step(s) % 200) + 20;
int b = (int)(xs_step(s) % 200) + 20;
int n = (int)(xs_step(s) % 30);
for (int r = 0; r < 8; r++)
for (int c = 0; c < 8; c++) {
int base = (c < 4) ? a : b;
int noise = ((int)(xs_step(s) % (2*n + 1))) - n;
int v = base + noise;
buf[r*EDGE_STRIDE + c] = (uint8_t)(v < 0 ? 0 : v > 255 ? 255 : v);
}
}
static void gen_thresholds(int *E, int *I, int *H, uint64_t *s) {
*E = (int)(xs_step(s) % 81);
*I = (int)(xs_step(s) % 41);
*H = (int)(xs_step(s) % 11);
}
static double now_s(void) {
struct timespec t; clock_gettime(CLOCK_MONOTONIC_RAW, &t);
return t.tv_sec + t.tv_nsec * 1e-9;
}
static volatile int g_stop = 0;
static pthread_barrier_t g_start;
/* --- NEON worker ------------------------------------------------- */
#define NEON_BATCH 8192 /* edges held in memory per worker */
typedef struct {
int worker_id, affinity_core;
uint64_t edges_done;
double elapsed_s;
} neon_args;
static void *neon_worker(void *p)
{
neon_args *a = p;
cpu_set_t cs; CPU_ZERO(&cs); CPU_SET(a->affinity_core, &cs);
pthread_setaffinity_np(pthread_self(), sizeof(cs), &cs);
uint64_t s = xs_init((uint64_t) a->worker_id * 0xc01dbeefULL);
uint8_t *master = malloc((size_t) NEON_BATCH * EDGE_BYTES);
uint8_t *work = malloc((size_t) NEON_BATCH * EDGE_BYTES);
int *Es = malloc(NEON_BATCH * sizeof(int));
int *Is = malloc(NEON_BATCH * sizeof(int));
int *Hs = malloc(NEON_BATCH * sizeof(int));
for (int i = 0; i < NEON_BATCH; i++) {
gen_edge_pixels(master + (size_t)i * EDGE_BYTES, &s);
gen_thresholds(&Es[i], &Is[i], &Hs[i], &s);
}
pthread_barrier_wait(&g_start);
double t0 = now_s();
uint64_t done = 0;
while (!g_stop) {
memcpy(work, master, (size_t) NEON_BATCH * EDGE_BYTES);
for (int i = 0; i < NEON_BATCH; i++)
ff_vp9_loop_filter_h_8_8_neon(work + (size_t)i * EDGE_BYTES + 4,
EDGE_STRIDE, Es[i], Is[i], Hs[i]);
done += NEON_BATCH;
}
a->elapsed_s = now_s() - t0;
a->edges_done = done;
free(master); free(work); free(Es); free(Is); free(Hs);
return NULL;
}
/* --- QPU worker ------------------------------------------------- */
typedef struct {
int affinity_core;
int n_edges;
uint64_t edges_done;
double elapsed_s;
} qpu_args;
typedef struct {
uint32_t n_edges, dst_stride_u8, _pad0, _pad1;
} push_consts;
static void *qpu_worker(void *p)
{
qpu_args *a = p;
cpu_set_t cs; CPU_ZERO(&cs); CPU_SET(a->affinity_core, &cs);
pthread_setaffinity_np(pthread_self(), sizeof(cs), &cs);
v3d_runner *r = v3d_runner_create();
if (!r) return NULL;
int n_edges = a->n_edges;
size_t dst_bytes = (size_t) n_edges * EDGE_BYTES;
size_t meta_bytes = (size_t) n_edges * 4 * sizeof(uint32_t);
v3d_buffer buf_meta = {0}, buf_dst = {0};
v3d_runner_create_buffer(r, meta_bytes, &buf_meta);
v3d_runner_create_buffer(r, dst_bytes, &buf_dst);
uint64_t s = 0xfeedfacecafebabeULL;
uint8_t *master = malloc(dst_bytes);
for (int i = 0; i < n_edges; i++) gen_edge_pixels(master + (size_t)i * EDGE_BYTES, &s);
uint32_t *meta = buf_meta.mapped;
assert(EDGE_STRIDE >= 4);
for (int i = 0; i < n_edges; i++) {
uint32_t mx = (uint32_t)((size_t)i * EDGE_BYTES + 4);
assert(mx >= 4);
int E, I, H; gen_thresholds(&E, &I, &H, &s);
meta[4*i + 0] = mx;
meta[4*i + 1] = (uint32_t) E;
meta[4*i + 2] = (uint32_t) I;
meta[4*i + 3] = (uint32_t) H;
}
memcpy(buf_dst.mapped, master, dst_bytes);
v3d_pipeline pipe = {0};
v3d_runner_create_pipeline(r, "v3d_lpf_h_8_8.spv", 2, sizeof(push_consts), &pipe);
v3d_buffer bufs[2] = { buf_meta, buf_dst };
v3d_runner_bind_buffers(r, &pipe, bufs, 2);
const uint32_t edges_per_wg = 32;
uint32_t gc = (uint32_t)((n_edges + edges_per_wg - 1) / edges_per_wg);
push_consts pc = { .n_edges = (uint32_t) n_edges,
.dst_stride_u8 = EDGE_STRIDE };
VkCommandBuffer cb = v3d_runner_alloc_cmdbuf(r);
VkCommandBufferBeginInfo cbbi = { .sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_BEGIN_INFO };
vkBeginCommandBuffer(cb, &cbbi);
vkCmdBindPipeline(cb, VK_PIPELINE_BIND_POINT_COMPUTE, pipe.pipeline);
vkCmdBindDescriptorSets(cb, VK_PIPELINE_BIND_POINT_COMPUTE,
pipe.layout, 0, 1, &pipe.desc_set, 0, NULL);
vkCmdPushConstants(cb, pipe.layout, VK_SHADER_STAGE_COMPUTE_BIT,
0, sizeof(pc), &pc);
vkCmdDispatch(cb, gc, 1, 1);
vkEndCommandBuffer(cb);
for (int i = 0; i < 5; i++) v3d_runner_submit_wait(r, cb); /* warm */
pthread_barrier_wait(&g_start);
double t0 = now_s();
uint64_t done = 0;
while (!g_stop) {
memcpy(buf_dst.mapped, master, dst_bytes);
v3d_runner_submit_wait(r, cb);
done += n_edges;
}
a->elapsed_s = now_s() - t0;
a->edges_done = done;
free(master);
v3d_runner_destroy_pipeline(r, &pipe);
v3d_runner_destroy_buffer(r, &buf_dst);
v3d_runner_destroy_buffer(r, &buf_meta);
v3d_runner_destroy(r);
return NULL;
}
/* --- Timer ------------------------------------------------------ */
typedef struct { double duration_s; } timer_args;
static void *timer_thread(void *p) {
timer_args *a = p;
pthread_barrier_wait(&g_start);
double end = now_s() + a->duration_s;
while (now_s() < end) {
struct timespec ts = {0, 1000000}; nanosleep(&ts, NULL);
}
g_stop = 1;
return NULL;
}
/* --- Main ------------------------------------------------------- */
enum mode { MODE_NEON, MODE_QPU, MODE_MIXED };
int main(int argc, char **argv)
{
enum mode mode = MODE_NEON;
int n_neon = 4;
int qpu_core = 3;
int qpu_n_edges = 65536;
double duration = 8.0;
static struct option opts[] = {
{"mode", required_argument, 0, 'm'},
{"neon-threads", required_argument, 0, 'n'},
{"qpu-core", required_argument, 0, 'c'},
{"qpu-edges", required_argument, 0, 'e'},
{"duration", required_argument, 0, 'd'},
{0,0,0,0}
};
for (int c; (c = getopt_long(argc, argv, "m:n:c:e:d:", opts, 0)) != -1;) {
switch (c) {
case 'm':
if (!strcmp(optarg, "neon-only")) mode = MODE_NEON;
else if (!strcmp(optarg, "qpu-only")) mode = MODE_QPU;
else if (!strcmp(optarg, "mixed")) mode = MODE_MIXED;
else { fprintf(stderr, "bad mode\n"); return 2; }
break;
case 'n': n_neon = atoi(optarg); break;
case 'c': qpu_core = atoi(optarg); break;
case 'e': qpu_n_edges = atoi(optarg); break;
case 'd': duration = atof(optarg); break;
default: return 2;
}
}
int has_qpu = (mode == MODE_QPU || mode == MODE_MIXED);
int has_neon = (mode == MODE_NEON || mode == MODE_MIXED);
int n_workers = (has_neon ? n_neon : 0) + (has_qpu ? 1 : 0);
int barrier_count = n_workers + 1 /* timer */ + 1 /* main */;
printf("=== M4'''' concurrent LPF wd=8 bench ===\n");
printf(" mode: %s\n", mode == MODE_NEON ? "neon-only" : mode == MODE_QPU ? "qpu-only" : "mixed");
printf(" neon threads: %d (cores 0..%d)\n", has_neon ? n_neon : 0, has_neon ? n_neon - 1 : -1);
printf(" qpu host: core %d, %d edges/dispatch\n",
has_qpu ? qpu_core : -1, has_qpu ? qpu_n_edges : 0);
printf(" duration: %.1f s\n\n", duration);
pthread_barrier_init(&g_start, NULL, barrier_count);
pthread_t timer_tid; timer_args ta = { .duration_s = duration };
pthread_create(&timer_tid, NULL, timer_thread, &ta);
pthread_t neon_tids[16] = {0};
neon_args n_args[16] = {0};
if (has_neon) {
for (int i = 0; i < n_neon; i++) {
n_args[i] = (neon_args){ .worker_id = i, .affinity_core = i };
pthread_create(&neon_tids[i], NULL, neon_worker, &n_args[i]);
}
}
pthread_t qpu_tid = 0;
qpu_args q_args = {0};
if (has_qpu) {
q_args = (qpu_args){ .affinity_core = qpu_core, .n_edges = qpu_n_edges };
pthread_create(&qpu_tid, NULL, qpu_worker, &q_args);
}
pthread_barrier_wait(&g_start);
pthread_join(timer_tid, NULL);
if (has_neon) for (int i = 0; i < n_neon; i++) pthread_join(neon_tids[i], NULL);
if (has_qpu) pthread_join(qpu_tid, NULL);
uint64_t total_edges = 0; double max_elapsed = 0;
if (has_neon) {
printf("NEON per-thread:\n");
for (int i = 0; i < n_neon; i++) {
double mes = n_args[i].edges_done / n_args[i].elapsed_s / 1e6;
printf(" core %d: %.3f Medge/s (%llu edges / %.3f s)\n",
n_args[i].affinity_core, mes,
(unsigned long long) n_args[i].edges_done, n_args[i].elapsed_s);
total_edges += n_args[i].edges_done;
if (n_args[i].elapsed_s > max_elapsed) max_elapsed = n_args[i].elapsed_s;
}
}
if (has_qpu) {
double mes = q_args.edges_done / q_args.elapsed_s / 1e6;
printf("QPU (host core %d): %.3f Medge/s (%llu edges / %.3f s)\n",
q_args.affinity_core, mes,
(unsigned long long) q_args.edges_done, q_args.elapsed_s);
total_edges += q_args.edges_done;
if (q_args.elapsed_s > max_elapsed) max_elapsed = q_args.elapsed_s;
}
double total_mes = total_edges / max_elapsed / 1e6;
printf("\n=== AGGREGATE ===\n");
printf(" total edges : %llu\n", (unsigned long long) total_edges);
printf(" wall-clock : %.3f s\n", max_elapsed);
printf(" Medge/s : %.3f\n", total_mes);
pthread_barrier_destroy(&g_start);
return 0;
}
tests/bench_neon_lpf8.c
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/*
* Cycle 4 Phase 3 — NEON M3'''' baseline for VP9 8-tap inner LPF wd=8
* (horizontal direction, 8-pixel edge).
*
* Same harness shape as bench_neon_lpf.c (cycle 2); the only changes
* are calling ff_vp9_loop_filter_h_8_8_neon + the wd=8 C reference.
*
* License: LGPL-2.1+ (links FFmpeg NEON snapshot).
*/
#define _POSIX_C_SOURCE 200809L
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <stddef.h>
#include <string.h>
#include <time.h>
#include <getopt.h>
extern void daedalus_vp9_loop_filter_h_8_8_ref(
uint8_t *dst, ptrdiff_t stride, int E, int I, int H);
extern void ff_vp9_loop_filter_h_8_8_neon(
uint8_t *dst, ptrdiff_t stride, int E, int I, int H);
static uint64_t xs_state;
static inline uint64_t xs(void) {
uint64_t x = xs_state;
x ^= x << 13; x ^= x >> 7; x ^= x << 17;
return xs_state = x;
}
#define EDGE_W 8
#define EDGE_H 8
#define EDGE_STRIDE 8
#define EDGE_BYTES (EDGE_H * EDGE_STRIDE)
static void gen_edge_pixels(uint8_t *buf)
{
int side_a = (int)(xs() % 200) + 20;
int side_b = (int)(xs() % 200) + 20;
int noise = (int)(xs() % 30);
for (int r = 0; r < EDGE_H; r++)
for (int c = 0; c < EDGE_W; c++) {
int base = (c < 4) ? side_a : side_b;
int n = ((int)(xs() % (2 * noise + 1))) - noise;
int v = base + n;
buf[r * EDGE_STRIDE + c] = (uint8_t)(v < 0 ? 0 : v > 255 ? 255 : v);
}
}
static void gen_thresholds(int *E, int *I, int *H) {
*E = (int)(xs() % 81);
*I = (int)(xs() % 41);
*H = (int)(xs() % 11);
}
static double now_seconds(void) {
struct timespec ts; clock_gettime(CLOCK_MONOTONIC_RAW, &ts);
return ts.tv_sec + ts.tv_nsec * 1e-9;
}
static int correctness_check(uint64_t seed, int n)
{
xs_state = seed ? seed : 0xa57edbeef5717ULL;
int mis = 0;
uint8_t a[EDGE_BYTES], b[EDGE_BYTES];
for (int i = 0; i < n; i++) {
gen_edge_pixels(a);
memcpy(b, a, EDGE_BYTES);
int E, I, H; gen_thresholds(&E, &I, &H);
daedalus_vp9_loop_filter_h_8_8_ref(a + 4, EDGE_STRIDE, E, I, H);
ff_vp9_loop_filter_h_8_8_neon (b + 4, EDGE_STRIDE, E, I, H);
if (memcmp(a, b, EDGE_BYTES) != 0) {
if (mis < 3) fprintf(stderr, "MISMATCH edge %d E=%d I=%d H=%d\n", i, E, I, H);
mis++;
}
}
printf("M1''''_c correctness: %d / %d edges bit-exact (%.4f%%)\n",
n - mis, n, 100.0 * (n - mis) / n);
return mis;
}
static void throughput(uint64_t seed, int n_edges, double duration)
{
xs_state = seed ? seed : 0xa57edfeed5170ULL;
uint8_t *master = malloc((size_t) n_edges * EDGE_BYTES);
uint8_t *work = malloc((size_t) n_edges * EDGE_BYTES);
int *Es = malloc(n_edges*sizeof(int)), *Is = malloc(n_edges*sizeof(int)), *Hs = malloc(n_edges*sizeof(int));
for (int i = 0; i < n_edges; i++) {
gen_edge_pixels(master + (size_t)i * EDGE_BYTES);
gen_thresholds(&Es[i], &Is[i], &Hs[i]);
}
memcpy(work, master, (size_t) n_edges * EDGE_BYTES);
for (int i = 0; i < n_edges; i++)
ff_vp9_loop_filter_h_8_8_neon(work + (size_t)i * EDGE_BYTES + 4, EDGE_STRIDE, Es[i], Is[i], Hs[i]);
double t0 = now_seconds(), tend = t0 + duration;
uint64_t done = 0;
while (now_seconds() < tend) {
memcpy(work, master, (size_t) n_edges * EDGE_BYTES);
for (int i = 0; i < n_edges; i++)
ff_vp9_loop_filter_h_8_8_neon(work + (size_t)i * EDGE_BYTES + 4, EDGE_STRIDE, Es[i], Is[i], Hs[i]);
done += n_edges;
}
double el = now_seconds() - t0;
int it = (int)(done / n_edges);
double s0 = now_seconds();
for (int i = 0; i < it; i++) memcpy(work, master, (size_t) n_edges * EDGE_BYTES);
double s1 = now_seconds();
double ks = el - (s1 - s0);
double mes = done / ks / 1e6;
printf("M3'''' NEON throughput:\n");
printf(" edges/batch: %d\n", n_edges);
printf(" total edges: %llu\n", (unsigned long long) done);
printf(" elapsed (kernel)=%.6f s\n", ks);
printf(" throughput = %.3f Medge/s\n", mes);
printf(" per-edge = %.1f ns\n", ks / done * 1e9);
printf(" equiv 1080p = %.1f FPS (~64530 edges/frame, worst case)\n",
mes * 1e6 / 64530.0);
free(master); free(work); free(Es); free(Is); free(Hs);
}
int main(int argc, char **argv)
{
int n_edges = 65536;
double duration = 5.0;
uint64_t seed = 0;
int do_corr = 1;
static struct option opts[] = {
{"edges", required_argument, 0, 'e'},
{"duration", required_argument, 0, 'd'},
{"seed", required_argument, 0, 's'},
{"no-correctness", no_argument, 0, 'C'},
{0,0,0,0}
};
for (int c; (c = getopt_long(argc, argv, "e:d:s:C", opts, 0)) != -1;) {
switch (c) {
case 'e': n_edges = atoi(optarg); break;
case 'd': duration = atof(optarg); break;
case 's': seed = strtoull(optarg, 0, 0); break;
case 'C': do_corr = 0; break;
default: return 2;
}
}
if (do_corr) {
printf("=== M1''''_c bit-exact (10000 random edges) ===\n");
if (correctness_check(seed, 10000) != 0) return 1;
printf("\n");
}
printf("=== M3'''' NEON throughput ===\n");
throughput(seed, n_edges, duration);
return 0;
}
tests/bench_v3d_lpf8.c
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/*
* Cycle 4 Phase 6 — QPU bench for VP9 wd=8 LPF.
* Mirrors bench_v3d_lpf.c (cycle 2); changes: calls the wd=8 ref
* + asserts dst_stride >= 6 (cycle 4 contract).
*/
#define _POSIX_C_SOURCE 200809L
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <string.h>
#include <stddef.h>
#include <assert.h>
#include <time.h>
#include <getopt.h>
#include <vulkan/vulkan.h>
#include "v3d_runner.h"
extern void daedalus_vp9_loop_filter_h_8_8_ref(
uint8_t *dst, ptrdiff_t stride, int E, int I, int H);
#define EDGE_STRIDE 8
#define EDGE_BYTES 64
static uint64_t xs_state;
static inline uint64_t xs(void) {
uint64_t x = xs_state; x ^= x<<13; x ^= x>>7; x ^= x<<17;
return xs_state = x;
}
static void gen_edge_pixels(uint8_t *buf) {
int a = (int)(xs() % 200) + 20;
int b = (int)(xs() % 200) + 20;
int n = (int)(xs() % 30);
for (int r = 0; r < 8; r++)
for (int c = 0; c < 8; c++) {
int base = (c < 4) ? a : b;
int noise = ((int)(xs() % (2*n + 1))) - n;
int v = base + noise;
buf[r*EDGE_STRIDE + c] = (uint8_t)(v < 0 ? 0 : v > 255 ? 255 : v);
}
}
static void gen_thresholds(int *E, int *I, int *H) {
*E = (int)(xs() % 81);
*I = (int)(xs() % 41);
*H = (int)(xs() % 11);
}
static double now_seconds(void) {
struct timespec ts; clock_gettime(CLOCK_MONOTONIC_RAW, &ts);
return ts.tv_sec + ts.tv_nsec * 1e-9;
}
typedef struct { uint32_t n_edges, blocks_per_row, dst_stride_u8, _pad; } push_consts;
int main(int argc, char **argv)
{
int n_edges = 65536, iters = 100, verify_only = 0;
uint64_t seed = 0;
const char *spv = "v3d_lpf_h_8_8.spv";
static struct option opts[] = {
{"edges", required_argument, 0, 'e'},
{"iters", required_argument, 0, 'i'},
{"seed", required_argument, 0, 's'},
{"spv", required_argument, 0, 'S'},
{"verify-only", no_argument, 0, 'V'},
{0,0,0,0}
};
for (int c; (c = getopt_long(argc, argv, "e:i:s:S:V", opts, 0)) != -1;) {
switch (c) {
case 'e': n_edges = atoi(optarg); break;
case 'i': iters = atoi(optarg); break;
case 's': seed = strtoull(optarg, 0, 0); break;
case 'S': spv = optarg; break;
case 'V': verify_only = 1; break;
default: return 2;
}
}
xs_state = seed ? seed : 0xa57edbeef5717ULL;
v3d_runner *r = v3d_runner_create();
if (!r) return 1;
printf("=== v3d LPF h_8_8 bench ===\n");
printf(" device: %s\n n_edges: %d iters: %d\n",
v3d_runner_device_name(r), n_edges, iters);
size_t dst_bytes = (size_t) n_edges * EDGE_BYTES;
size_t meta_bytes = (size_t) n_edges * 4 * sizeof(uint32_t);
v3d_buffer buf_meta = {0}, buf_dst = {0};
v3d_runner_create_buffer(r, meta_bytes, &buf_meta);
v3d_runner_create_buffer(r, dst_bytes, &buf_dst);
uint8_t *master = malloc(dst_bytes);
uint8_t *expected = malloc(dst_bytes);
int *Es = malloc(n_edges*sizeof(int)), *Is = malloc(n_edges*sizeof(int)), *Hs = malloc(n_edges*sizeof(int));
for (int i = 0; i < n_edges; i++) {
gen_edge_pixels(master + (size_t)i * EDGE_BYTES);
gen_thresholds(&Es[i], &Is[i], &Hs[i]);
}
memcpy(expected, master, dst_bytes);
for (int i = 0; i < n_edges; i++)
daedalus_vp9_loop_filter_h_8_8_ref(expected + (size_t)i * EDGE_BYTES + 4,
EDGE_STRIDE, Es[i], Is[i], Hs[i]);
uint32_t dst_stride = EDGE_STRIDE;
assert(dst_stride >= 6 && "cycle 4 §4 contract: dst_stride_u8 >= 6 (flat8in 6-write)");
uint32_t *meta = buf_meta.mapped;
for (int i = 0; i < n_edges; i++) {
uint32_t mx = (uint32_t)((size_t)i * EDGE_BYTES + 4);
assert(mx >= 4);
meta[4*i + 0] = mx;
meta[4*i + 1] = (uint32_t) Es[i];
meta[4*i + 2] = (uint32_t) Is[i];
meta[4*i + 3] = (uint32_t) Hs[i];
}
memcpy(buf_dst.mapped, master, dst_bytes);
v3d_pipeline pipe = {0};
if (v3d_runner_create_pipeline(r, spv, 2, sizeof(push_consts), &pipe)) return 1;
v3d_buffer bufs[2] = { buf_meta, buf_dst };
v3d_runner_bind_buffers(r, &pipe, bufs, 2);
const uint32_t edges_per_wg = 32;
uint32_t gc = (uint32_t)((n_edges + edges_per_wg - 1) / edges_per_wg);
push_consts pc = { .n_edges = (uint32_t) n_edges, .dst_stride_u8 = dst_stride };
VkCommandBuffer cb = v3d_runner_alloc_cmdbuf(r);
VkCommandBufferBeginInfo cbbi = { .sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_BEGIN_INFO };
vkBeginCommandBuffer(cb, &cbbi);
vkCmdBindPipeline(cb, VK_PIPELINE_BIND_POINT_COMPUTE, pipe.pipeline);
vkCmdBindDescriptorSets(cb, VK_PIPELINE_BIND_POINT_COMPUTE,
pipe.layout, 0, 1, &pipe.desc_set, 0, NULL);
vkCmdPushConstants(cb, pipe.layout, VK_SHADER_STAGE_COMPUTE_BIT, 0, sizeof(pc), &pc);
vkCmdDispatch(cb, gc, 1, 1);
vkEndCommandBuffer(cb);
/* M1'''' */
printf("\n=== M1'''': QPU vs C bit-exact ===\n");
memcpy(buf_dst.mapped, master, dst_bytes);
if (v3d_runner_submit_wait(r, cb)) return 1;
int mis = 0, bytediffs = 0;
for (int i = 0; i < n_edges; i++) {
const uint8_t *q = (uint8_t *) buf_dst.mapped + (size_t)i * EDGE_BYTES;
const uint8_t *e = expected + (size_t)i * EDGE_BYTES;
if (memcmp(q, e, EDGE_BYTES) != 0) {
int d = 0;
for (int j = 0; j < EDGE_BYTES; j++) if (q[j] != e[j]) d++;
bytediffs += d;
if (mis < 3) fprintf(stderr, "MISMATCH edge %d (E=%d I=%d H=%d): %d/64 bytes\n",
i, Es[i], Is[i], Hs[i], d);
mis++;
}
}
printf(" edges bit-exact: %d / %d (%.4f%%)\n",
n_edges - mis, n_edges, 100.0 * (n_edges - mis) / n_edges);
if (mis > 0) { fprintf(stderr, "REFUSING throughput on broken kernel.\n"); return 1; }
if (verify_only) return 0;
/* M2'''' */
printf("\n=== M2'''': QPU throughput ===\n");
for (int i = 0; i < 10; i++) { memcpy(buf_dst.mapped, master, dst_bytes); v3d_runner_submit_wait(r, cb); }
double t0 = now_seconds();
for (int i = 0; i < iters; i++) { memcpy(buf_dst.mapped, master, dst_bytes); v3d_runner_submit_wait(r, cb); }
double t1 = now_seconds();
double s0 = now_seconds();
for (int i = 0; i < iters; i++) memcpy(buf_dst.mapped, master, dst_bytes);
double s1 = now_seconds();
double ks = (t1 - t0) - (s1 - s0);
double total = (double) n_edges * iters;
double mes = total / ks / 1e6;
printf(" edges/dispatch: %d, iters: %d, total: %.0f\n", n_edges, iters, total);
printf(" elapsed (kernel)=%.6f s\n per-edge = %.1f ns\n per-dispatch = %.1f us\n",
ks, ks / total * 1e9, ks / iters * 1e6);
printf(" M2'''' = %.3f Medge/s\n", mes);
double M3 = 52.382; /* k4 phase 3 baseline */
double R = mes / M3;
printf("\n Cycle 4 NEON M3'''' = %.3f Medge/s\n", M3);
printf(" R'''' = M2''''/M3'''' = %.3f\n", R);
if (R >= 1.0) printf(" decision band = GREEN\n");
else if (R >= 0.5) printf(" decision band = YELLOW\n");
else if (R >= 0.1) printf(" decision band = ORANGE\n");
else printf(" decision band = RED\n");
double floor30 = 64530.0 * 30 / 1e6;
printf(" 30fps@1080p floor : %.3f Medge/s — %.1fx margin\n",
floor30, mes / floor30);
v3d_runner_destroy_pipeline(r, &pipe);
v3d_runner_destroy_buffer(r, &buf_dst);
v3d_runner_destroy_buffer(r, &buf_meta);
v3d_runner_destroy(r);
return 0;
}
tests/vp9_lpf8_ref.c
+74
View File
@@ -0,0 +1,74 @@
/*
* Standalone bit-exact C reference for VP9 8-tap inner loop filter
* (wd=8, horizontal, 8-pixel edge). Transcribed from FFmpeg's
* libavcodec/vp9dsp_template.c loop_filter() function with wd=8
* (vendored at external/ffmpeg-snapshot/). 8-bit pixels only.
*
* Differs from cycle 2's vp9_lpf_ref.c (wd=4) in:
* - Adds flat8in test (6 abs comparisons) per row
* - If flat8in passes, writes 6 pixels (p2 p1 p0 q0 q1 q2) per row
* using 8-pixel-input flat filter
* - Otherwise falls through to wd=4 hev/no-hev paths
*
* License: LGPL-2.1-or-later (matches upstream).
* Spec: VP9 specification §8.8.1.
*/
#include <stdint.h>
#include <stddef.h>
static inline int abs_i(int x) { return x < 0 ? -x : x; }
static inline int clip_intp2_7(int x) { return x > 127 ? 127 : x < -128 ? -128 : x; }
static inline uint8_t clip_u8(int x) { return (uint8_t)(x > 255 ? 255 : x < 0 ? 0 : x); }
static inline int min_i(int a, int b) { return a < b ? a : b; }
/* wd=8 inner-edge horizontal LPF. 8 rows, neighborhood [-4..+3] cols. */
void daedalus_vp9_loop_filter_h_8_8_ref(uint8_t *dst, ptrdiff_t stride,
int E, int I, int H)
{
const int F = 1; /* 1 << (BIT_DEPTH - 8) for BIT_DEPTH=8 */
for (int i = 0; i < 8; i++, dst += stride) {
int p3 = dst[-4], p2 = dst[-3], p1 = dst[-2], p0 = dst[-1];
int q0 = dst[ 0], q1 = dst[+1], q2 = dst[+2], q3 = dst[+3];
int fm = abs_i(p3 - p2) <= I && abs_i(p2 - p1) <= I &&
abs_i(p1 - p0) <= I && abs_i(q1 - q0) <= I &&
abs_i(q2 - q1) <= I && abs_i(q3 - q2) <= I &&
abs_i(p0 - q0) * 2 + (abs_i(p1 - q1) >> 1) <= E;
if (!fm) continue;
int flat8in = abs_i(p3 - p0) <= F && abs_i(p2 - p0) <= F &&
abs_i(p1 - p0) <= F && abs_i(q1 - q0) <= F &&
abs_i(q2 - q0) <= F && abs_i(q3 - q0) <= F;
if (flat8in) {
/* 8-pixel-input "inner flat" filter, 6 outputs. */
dst[-3] = (uint8_t)((p3 + p3 + p3 + 2 * p2 + p1 + p0 + q0 + 4) >> 3);
dst[-2] = (uint8_t)((p3 + p3 + p2 + 2 * p1 + p0 + q0 + q1 + 4) >> 3);
dst[-1] = (uint8_t)((p3 + p2 + p1 + 2 * p0 + q0 + q1 + q2 + 4) >> 3);
dst[ 0] = (uint8_t)((p2 + p1 + p0 + 2 * q0 + q1 + q2 + q3 + 4) >> 3);
dst[+1] = (uint8_t)((p1 + p0 + q0 + 2 * q1 + q2 + q3 + q3 + 4) >> 3);
dst[+2] = (uint8_t)((p0 + q0 + q1 + 2 * q2 + q3 + q3 + q3 + 4) >> 3);
} else {
/* Fall-through: same wd=4 hev/no-hev paths as cycle 2. */
int hev = abs_i(p1 - p0) > H || abs_i(q1 - q0) > H;
if (hev) {
int f = clip_intp2_7(p1 - q1);
f = clip_intp2_7(3 * (q0 - p0) + f);
int f1 = min_i(f + 4, 127) >> 3;
int f2 = min_i(f + 3, 127) >> 3;
dst[-1] = clip_u8(p0 + f2);
dst[ 0] = clip_u8(q0 - f1);
} else {
int f = clip_intp2_7(3 * (q0 - p0));
int f1 = min_i(f + 4, 127) >> 3;
int f2 = min_i(f + 3, 127) >> 3;
dst[-1] = clip_u8(p0 + f2);
dst[ 0] = clip_u8(q0 - f1);
int fp = (f1 + 1) >> 1;
dst[-2] = clip_u8(p1 + fp);
dst[+1] = clip_u8(q1 - fp);
}
}
}
}