notes: Patch C2 Phase 7 — N=3 ramp, no measurable throughput delta #15
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N=3 reps on C2 (cleanups+F+G+D+E+C2 srcversion
619A51E61BF5479AAC146E6, fresh chip uptime 544/716/750 s):N=3 mean 2.277 MB/s. vs Patch C v3 N=3 (2.352): -3% (within rep variance). vs Patch B baseline (1.362): +67%.
C2 was predicted in plan §4.5 as a possible <2% delta outcome — observed -3%, within noise. Ship for kernel.org-submission upstream-cleanliness anyway. The tasklet hop in
ieee80211_rx_irqsafewas apparently cheap on this kernel.Phase 8 lesson
Drop-in API correctness moves don't always pay perf dividends. Patch C v3 architectural change remains the durable +73% win; D / E / C2 / F / G are cleanup-class patches that don't visibly compound above noise.
Throughput ceiling on this hardware: ~2.4 MB/s sustained @ 4 MB/s sender, fresh chip. Further improvement requires firmware-side fixes (
wsm_generic_confirm 0x0007), not driver-side.Campaign closure