Bug #5 Phase 1 metric + Phase 0 anchor receipts #6
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Phase 0 anchored at N=3 reps under 4 MB/s pv-cap on 2.4GHz newton.
Headline
_raw_spin_unlock_irqrestoreat ~20 % of CPU in BOTH healthy and failed reps, callstackprocess_one_work → wsm_configuration → wsm_cmd_send → bes2600_bh.isra.0 → unlock. Lock-cycling cost is the floor of throughput.bes2600/wsm.c:98(wsm_cmd_send()),bes2600/bh.c:435,559,847(vif_list_lockcycling in BH dispatcher).Phase 1 metric (locked)
Three measurable outcomes: throughput floor ≥ 2 MB/s, lock-cycle ceiling < 10 % CPU, no cascade in 30 min.
Phase 4 candidates (preliminary)
wsm_cmd_sendlock scope (smallest, fastest)vif_list_lockin BH dispatcher (medium)Asks
wsm_cmd_sendfor lock-holdtime distribution before committing to any patch?🤖 Generated with Claude Code
Lock B5-1 first as the shortest path to data, or jump to B5-3 for the bigger ceiling lift? data first.
Add tracepoints around wsm_cmd_send for lock-holdtime distribution before committing to any patch? Yes. And, if I understand you correctly, the lock is issued many times over before released. So lock count should also be measured - how many locks before release? I Have a feeling the driver was created with a "when in doubt, at a lock" kind of approach. Also backlog a full architect review by Sonnet of the thing we call a driver. The way your tracing looks, the quality of the code is... not so good.
Anything in the Phase 0 anchor that screams "you missed a confounder" before we lock Phase 1? No, but I see you are admitting to a pattern which is well received by "the user".