diff --git a/CMakeLists.txt b/CMakeLists.txt index 4a3481a..d71fc5c 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -350,7 +350,18 @@ if (DAEDALUS_BUILD_VULKAN) VERBATIM ) - add_custom_target(daedalus_shaders ALL DEPENDS ${NOOP_SPV} ${IDCT8_SPV} ${LPF_SPV} ${MC_SPV} ${LPF8_SPV} ${CDEF_SPV} ${H264DEBLOCK_SPV} ${H264DEBLOCK_H_SPV} ${H264DEBLOCK_CHROMA_V_SPV} ${H264DEBLOCK_CHROMA_H_SPV} ${H264_IDCT4_SPV} ${H264_IDCT8_SPV} ${H264_QPEL_MC20_SPV}) + set(H264_QPEL_MC02_SPV ${CMAKE_BINARY_DIR}/v3d_h264_qpel_mc02.spv) + add_custom_command( + OUTPUT ${H264_QPEL_MC02_SPV} + COMMAND ${GLSLANG_VALIDATOR} -V --target-env vulkan1.3 + -o ${H264_QPEL_MC02_SPV} + ${CMAKE_SOURCE_DIR}/src/v3d_h264_qpel_mc02.comp + DEPENDS ${CMAKE_SOURCE_DIR}/src/v3d_h264_qpel_mc02.comp + COMMENT "glslang: v3d_h264_qpel_mc02.comp -> v3d_h264_qpel_mc02.spv" + VERBATIM + ) + + add_custom_target(daedalus_shaders ALL DEPENDS ${NOOP_SPV} ${IDCT8_SPV} ${LPF_SPV} ${MC_SPV} ${LPF8_SPV} ${CDEF_SPV} ${H264DEBLOCK_SPV} ${H264DEBLOCK_H_SPV} ${H264DEBLOCK_CHROMA_V_SPV} ${H264DEBLOCK_CHROMA_H_SPV} ${H264_IDCT4_SPV} ${H264_IDCT8_SPV} ${H264_QPEL_MC20_SPV} ${H264_QPEL_MC02_SPV}) # v3d_runner — reusable Vulkan plumbing. add_library(v3d_runner STATIC src/v3d_runner.c) @@ -489,6 +500,7 @@ if (DAEDALUS_BUILD_VULKAN) ${H264_IDCT4_SPV} ${H264_IDCT8_SPV} ${H264_QPEL_MC20_SPV} + ${H264_QPEL_MC02_SPV} DESTINATION ${CMAKE_INSTALL_DATADIR}/daedalus-fourier/shaders ) endif() diff --git a/src/daedalus_core.c b/src/daedalus_core.c index 566c0be..dee85b8 100644 --- a/src/daedalus_core.c +++ b/src/daedalus_core.c @@ -52,6 +52,8 @@ struct daedalus_ctx { v3d_pipeline h264_idct8_pipe; int h264_qpel_mc20_pipe_ready; v3d_pipeline h264_qpel_mc20_pipe; + int h264_qpel_mc02_pipe_ready; + v3d_pipeline h264_qpel_mc02_pipe; }; daedalus_ctx *daedalus_ctx_create(void) @@ -112,6 +114,7 @@ void daedalus_ctx_destroy(daedalus_ctx *ctx) if (ctx->h264_idct4_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_idct4_pipe); if (ctx->h264_idct8_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_idct8_pipe); if (ctx->h264_qpel_mc20_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc20_pipe); + if (ctx->h264_qpel_mc02_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc02_pipe); v3d_runner_destroy(ctx->runner); } free(ctx); @@ -147,7 +150,7 @@ daedalus_substrate daedalus_recipe_substrate_for(daedalus_kernel k) case DAEDALUS_KERNEL_H264_DEBLOCK_CV_INTRA: return DAEDALUS_SUBSTRATE_CPU; /* bS=4 chroma QPU pending */ case DAEDALUS_KERNEL_H264_DEBLOCK_CH_INTRA: return DAEDALUS_SUBSTRATE_CPU; case DAEDALUS_KERNEL_H264_QPEL_MC20: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc20.spv */ - case DAEDALUS_KERNEL_H264_QPEL_MC02: return DAEDALUS_SUBSTRATE_CPU; /* QPU mc02 shader pending */ + case DAEDALUS_KERNEL_H264_QPEL_MC02: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc02.spv */ case DAEDALUS_KERNEL_H264_QPEL_MC22: return DAEDALUS_SUBSTRATE_CPU; /* QPU mc22 shader pending (hv lowpass) */ case DAEDALUS_KERNEL_H264_QPEL_MC10: return DAEDALUS_SUBSTRATE_CPU; /* ¼-H L2 */ case DAEDALUS_KERNEL_H264_QPEL_MC30: return DAEDALUS_SUBSTRATE_CPU; /* ¾-H L2 */ @@ -1457,6 +1460,89 @@ fail: return -1; } +static int dispatch_h264_qpel_mc02_qpu(daedalus_ctx *ctx, + uint8_t *dst, const uint8_t *src, size_t stride, + size_t n_blocks, const daedalus_h264_qpel_meta *meta) +{ + /* Same shape as mc20 but with vertical access pattern. src_max + * reflects the row-wise filter window: bottom output row (r=7) + * reads up to row r+3 = 10 of the src; so src_max = src_off + + * 10*stride + 8 (last col + 1 for memcpy semantics). */ + if (!ctx->h264_qpel_mc02_pipe_ready) { + if (v3d_runner_create_pipeline(ctx->runner, "v3d_h264_qpel_mc02.spv", + 3, sizeof(h264_qpel_mc20_pc), + &ctx->h264_qpel_mc02_pipe) != 0) + return -1; + ctx->h264_qpel_mc02_pipe_ready = 1; + } + + size_t meta_bytes = n_blocks * 4 * sizeof(uint32_t); + size_t src_max = 0, dst_max = 0; + for (size_t i = 0; i < n_blocks; i++) { + size_t s_end = meta[i].src_off + (size_t) 10 * stride + 8; + size_t d_end = meta[i].dst_off + (size_t) 7 * stride + 8; + if (s_end > src_max) src_max = s_end; + if (d_end > dst_max) dst_max = d_end; + } + + v3d_buffer bs = {0}, bd = {0}, bm = {0}; + if (v3d_runner_create_buffer(ctx->runner, src_max, &bs)) return -1; + if (v3d_runner_create_buffer(ctx->runner, dst_max, &bd)) { + v3d_runner_destroy_buffer(ctx->runner, &bs); return -1; + } + if (v3d_runner_create_buffer(ctx->runner, meta_bytes, &bm)) { + v3d_runner_destroy_buffer(ctx->runner, &bd); + v3d_runner_destroy_buffer(ctx->runner, &bs); return -1; + } + + memcpy(bs.mapped, src, src_max); + memcpy(bd.mapped, dst, dst_max); + uint32_t *m = bm.mapped; + for (size_t i = 0; i < n_blocks; i++) { + m[4*i+0] = meta[i].dst_off; + m[4*i+1] = meta[i].src_off; + m[4*i+2] = 0; + m[4*i+3] = 0; + } + + v3d_buffer binds[3] = { bs, bd, bm }; + if (v3d_runner_bind_buffers(ctx->runner, &ctx->h264_qpel_mc02_pipe, binds, 3)) + goto fail; + + uint32_t wg_count = (uint32_t) n_blocks; + h264_qpel_mc20_pc pc = { + .n_blocks = (uint32_t) n_blocks, + .stride_u8 = (uint32_t) stride, + }; + + VkCommandBuffer cb = v3d_runner_alloc_cmdbuf(ctx->runner); + if (cb == VK_NULL_HANDLE) goto fail; + VkCommandBufferBeginInfo cbbi = { .sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_BEGIN_INFO }; + vkBeginCommandBuffer(cb, &cbbi); + vkCmdBindPipeline(cb, VK_PIPELINE_BIND_POINT_COMPUTE, + ctx->h264_qpel_mc02_pipe.pipeline); + vkCmdBindDescriptorSets(cb, VK_PIPELINE_BIND_POINT_COMPUTE, + ctx->h264_qpel_mc02_pipe.layout, 0, 1, + &ctx->h264_qpel_mc02_pipe.desc_set, 0, NULL); + vkCmdPushConstants(cb, ctx->h264_qpel_mc02_pipe.layout, + VK_SHADER_STAGE_COMPUTE_BIT, 0, sizeof(pc), &pc); + vkCmdDispatch(cb, wg_count, 1, 1); + vkEndCommandBuffer(cb); + if (v3d_runner_submit_wait(ctx->runner, cb)) goto fail; + + memcpy(dst, bd.mapped, dst_max); + + v3d_runner_destroy_buffer(ctx->runner, &bm); + v3d_runner_destroy_buffer(ctx->runner, &bd); + v3d_runner_destroy_buffer(ctx->runner, &bs); + return 0; +fail: + v3d_runner_destroy_buffer(ctx->runner, &bm); + v3d_runner_destroy_buffer(ctx->runner, &bd); + v3d_runner_destroy_buffer(ctx->runner, &bs); + return -1; +} + /* -------------------- Public dispatch entry points -------------- */ #define ROUTE_CPU_ONLY(_kernel, _cpu_fn, ...) \ @@ -1676,9 +1762,9 @@ int daedalus_dispatch_h264_qpel_mc02(daedalus_ctx *ctx, daedalus_substrate sub, eff = daedalus_recipe_substrate_for(DAEDALUS_KERNEL_H264_QPEL_MC02); if (eff == DAEDALUS_SUBSTRATE_QPU && !daedalus_ctx_has_qpu(ctx)) eff = DAEDALUS_SUBSTRATE_CPU; - if (eff == DAEDALUS_SUBSTRATE_QPU) - return -1; /* No mc02 QPU shader yet — explicit QPU fast-fails. */ - return dispatch_h264_qpel_mc02_cpu(ctx, dst, src, stride, n_blocks, meta); + if (eff == DAEDALUS_SUBSTRATE_CPU) + return dispatch_h264_qpel_mc02_cpu(ctx, dst, src, stride, n_blocks, meta); + return dispatch_h264_qpel_mc02_qpu(ctx, dst, src, stride, n_blocks, meta); } int daedalus_dispatch_h264_qpel_mc22(daedalus_ctx *ctx, daedalus_substrate sub, diff --git a/src/v3d_h264_qpel_mc02.comp b/src/v3d_h264_qpel_mc02.comp new file mode 100644 index 0000000..07462ed --- /dev/null +++ b/src/v3d_h264_qpel_mc02.comp @@ -0,0 +1,69 @@ +// daedalus-fourier — H.264 luma qpel mc02 (8x8, vertical half-pel), V3D 7.1. +// +// Sibling of cycle 9's v3d_h264_qpel_mc20.comp. Same 6-tap filter, +// transposed to vertical direction: +// +// dst[r,c] = clip255( +// ( s[r-2,c] +// - 5 * s[r-1,c] +// + 20 * s[r, c] +// + 20 * s[r+1,c] +// - 5 * s[r+2,c] +// + s[r+3,c] +// + 16 +// ) >> 5) +// +// src+src_off points at row 0 col 0 of the OUTPUT block; the filter +// reads rows -2..+3 (2 rows of top context, 3 rows of bottom). +// +// Same WG layout as mc20: 64 lanes / 1 block-per-WG / 1 lane-per-pixel. +// +// License: BSD-2-Clause. + +#version 450 +#extension GL_EXT_shader_8bit_storage : require +#extension GL_EXT_shader_explicit_arithmetic_types : require + +layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in; + +layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src; +layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst; +layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta; + +layout(push_constant) uniform PC { + uint n_blocks; + uint stride_u8; + uint _pad0, _pad1; +} pc; + +void main() +{ + uint block_idx = gl_WorkGroupID.x; + if (block_idx >= pc.n_blocks) return; + + uint lane = gl_LocalInvocationID.x; + uint r = lane >> 3; + uint c = lane & 7u; + + uint dst_off = u_meta.meta[block_idx].x; + uint src_off = u_meta.meta[block_idx].y; + uint stride = pc.stride_u8; + + // Read the 6 rows of vertical context at col (c) of THIS output row. + // src_off+r*stride+c is at the OUTPUT pixel position; the kernel + // samples r-2..r+3 along the column. Unsigned-safe because the + // public API contract guarantees src_off >= 2*stride. + uint col_base = src_off + c; + + int s_m2 = int(u_src.src[col_base + (r - 2u) * stride]); + int s_m1 = int(u_src.src[col_base + (r - 1u) * stride]); + int s_0 = int(u_src.src[col_base + r * stride]); + int s_p1 = int(u_src.src[col_base + (r + 1u) * stride]); + int s_p2 = int(u_src.src[col_base + (r + 2u) * stride]); + int s_p3 = int(u_src.src[col_base + (r + 3u) * stride]); + + int v = s_m2 - 5 * s_m1 + 20 * s_0 + 20 * s_p1 - 5 * s_p2 + s_p3 + 16; + int p = clamp(v >> 5, 0, 255); + + u_dst.dst[dst_off + r * stride + c] = uint8_t(p); +}