cycle 7: V3D shader for H.264 IDCT 8x8
Mirrors cycle 6 (PR #7 prior commit) but at 8x8 scale: 8 lanes per
block, 8 blocks per WG. H.264 §8.5.13.2 1D butterfly twice (row
pass, column pass), (val + 32) >> 6 rounded + clipped + added to
dst.
Bit-exact first try on hertz (Pi 5, V3D 7.1):
H264_IDCT4 recipe substrate: 2 (QPU)
H264_IDCT8 recipe substrate: 2 (QPU) ← flipped
H264_DEBLOCK_LV recipe substrate: 2 (QPU)
H264_QPEL_MC20 recipe substrate: 1 (CPU) ← task #165 remaining
H.264 IDCT 4x4: 2048/2048 bytes bit-exact
H.264 IDCT 8x8: 2048/2048 bytes bit-exact ← QPU
H.264 deblock luma v: 2048/2048 bytes bit-exact
H.264 qpel mc20: 1024/1024 bytes bit-exact
8 of 9 daedalus-fourier cycles now QPU-by-recipe. Only cycle 9
(H.264 luma qpel mc20) still CPU — different shape (6-tap MC
filter, not a transform) so needs its own shader template; task
#165 covers it as a follow-on.
Same pattern as cycle 6 commit (65bd5c3): adds h264_idct8_pipe
field + lazy init, dispatch_h264_idct8_qpu() with 3 SSBOs,
v3d_h264_idct8.spv install rule.
Uses v3d_runner_create_buffer / destroy_buffer (will swap to
pool API once PR #6 lands).
This commit is contained in:
+103
-3
@@ -42,6 +42,8 @@ struct daedalus_ctx {
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v3d_pipeline h264deblock_pipe;
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int h264_idct4_pipe_ready;
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v3d_pipeline h264_idct4_pipe;
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int h264_idct8_pipe_ready;
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v3d_pipeline h264_idct8_pipe;
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};
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daedalus_ctx *daedalus_ctx_create(void)
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@@ -97,6 +99,7 @@ void daedalus_ctx_destroy(daedalus_ctx *ctx)
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if (ctx->cdef_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->cdef_pipe);
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if (ctx->h264deblock_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264deblock_pipe);
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if (ctx->h264_idct4_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_idct4_pipe);
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if (ctx->h264_idct8_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_idct8_pipe);
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v3d_runner_destroy(ctx->runner);
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}
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free(ctx);
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@@ -122,7 +125,7 @@ daedalus_substrate daedalus_recipe_substrate_for(daedalus_kernel k)
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case DAEDALUS_KERNEL_VP9_LPF8_INNER: return DAEDALUS_SUBSTRATE_QPU;
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case DAEDALUS_KERNEL_AV1_CDEF_8X8: return DAEDALUS_SUBSTRATE_QPU; /* v3d_cdef.spv */
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case DAEDALUS_KERNEL_H264_IDCT4: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_idct4.spv */
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case DAEDALUS_KERNEL_H264_IDCT8: return DAEDALUS_SUBSTRATE_CPU; /* TODO task #165 */
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case DAEDALUS_KERNEL_H264_IDCT8: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_idct8.spv */
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case DAEDALUS_KERNEL_H264_DEBLOCK_LV: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264deblock.spv */
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case DAEDALUS_KERNEL_H264_QPEL_MC20: return DAEDALUS_SUBSTRATE_CPU; /* TODO task #165 */
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}
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@@ -838,6 +841,95 @@ fail:
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return -1;
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}
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/* -------------------- H.264 IDCT 8x8 QPU dispatch (cycle 7) ----- */
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typedef struct {
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uint32_t n_blocks;
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uint32_t dst_stride_u8;
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uint32_t _pad0;
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uint32_t _pad1;
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} h264_idct8_pc;
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static int dispatch_h264_idct8_qpu(daedalus_ctx *ctx,
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uint8_t *dst, size_t dst_stride,
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int16_t *coeffs, size_t n_blocks,
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const daedalus_h264_block_meta *meta)
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{
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if (!ctx->h264_idct8_pipe_ready) {
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if (v3d_runner_create_pipeline(ctx->runner, "v3d_h264_idct8.spv",
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3, sizeof(h264_idct8_pc),
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&ctx->h264_idct8_pipe) != 0)
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return -1;
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ctx->h264_idct8_pipe_ready = 1;
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}
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size_t coeff_bytes = n_blocks * 64 * sizeof(int16_t);
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size_t meta_bytes = n_blocks * 4 * sizeof(uint32_t);
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size_t dst_max = 0;
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for (size_t i = 0; i < n_blocks; i++) {
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size_t e = meta[i].dst_off + (size_t) 7 * dst_stride + 8;
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if (e > dst_max) dst_max = e;
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}
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v3d_buffer bc = {0}, bd = {0}, bm = {0};
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if (v3d_runner_create_buffer(ctx->runner, coeff_bytes, &bc)) return -1;
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if (v3d_runner_create_buffer(ctx->runner, dst_max, &bd)) {
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v3d_runner_destroy_buffer(ctx->runner, &bc); return -1;
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}
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if (v3d_runner_create_buffer(ctx->runner, meta_bytes, &bm)) {
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v3d_runner_destroy_buffer(ctx->runner, &bd);
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v3d_runner_destroy_buffer(ctx->runner, &bc); return -1;
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}
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memcpy(bc.mapped, coeffs, coeff_bytes);
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memcpy(bd.mapped, dst, dst_max);
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uint32_t *m = bm.mapped;
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for (size_t i = 0; i < n_blocks; i++) {
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m[4*i+0] = meta[i].dst_off;
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m[4*i+1] = 0;
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m[4*i+2] = 0;
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m[4*i+3] = 0;
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}
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v3d_buffer binds[3] = { bc, bd, bm };
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if (v3d_runner_bind_buffers(ctx->runner, &ctx->h264_idct8_pipe, binds, 3))
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goto fail;
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uint32_t wg_count = (uint32_t)((n_blocks + 7) / 8); /* 8 blocks/WG */
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h264_idct8_pc pc = {
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.n_blocks = (uint32_t) n_blocks,
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.dst_stride_u8 = (uint32_t) dst_stride,
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};
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VkCommandBuffer cb = v3d_runner_alloc_cmdbuf(ctx->runner);
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if (cb == VK_NULL_HANDLE) goto fail;
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VkCommandBufferBeginInfo cbbi = { .sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_BEGIN_INFO };
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vkBeginCommandBuffer(cb, &cbbi);
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vkCmdBindPipeline(cb, VK_PIPELINE_BIND_POINT_COMPUTE,
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ctx->h264_idct8_pipe.pipeline);
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vkCmdBindDescriptorSets(cb, VK_PIPELINE_BIND_POINT_COMPUTE,
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ctx->h264_idct8_pipe.layout, 0, 1,
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&ctx->h264_idct8_pipe.desc_set, 0, NULL);
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vkCmdPushConstants(cb, ctx->h264_idct8_pipe.layout,
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VK_SHADER_STAGE_COMPUTE_BIT, 0, sizeof(pc), &pc);
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vkCmdDispatch(cb, wg_count, 1, 1);
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vkEndCommandBuffer(cb);
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if (v3d_runner_submit_wait(ctx->runner, cb)) goto fail;
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memcpy(dst, bd.mapped, dst_max);
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memset(coeffs, 0, coeff_bytes);
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v3d_runner_destroy_buffer(ctx->runner, &bm);
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v3d_runner_destroy_buffer(ctx->runner, &bd);
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v3d_runner_destroy_buffer(ctx->runner, &bc);
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return 0;
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fail:
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v3d_runner_destroy_buffer(ctx->runner, &bm);
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v3d_runner_destroy_buffer(ctx->runner, &bd);
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v3d_runner_destroy_buffer(ctx->runner, &bc);
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return -1;
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}
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/* -------------------- Public dispatch entry points -------------- */
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#define ROUTE_CPU_ONLY(_kernel, _cpu_fn, ...) \
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@@ -943,8 +1035,16 @@ int daedalus_dispatch_h264_idct8(daedalus_ctx *ctx, daedalus_substrate sub,
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int16_t *coeffs, size_t n_blocks,
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const daedalus_h264_block_meta *meta)
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{
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ROUTE_CPU_ONLY(DAEDALUS_KERNEL_H264_IDCT8, dispatch_h264_idct8_cpu,
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dst, dst_stride, coeffs, n_blocks, meta);
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daedalus_substrate eff = sub;
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if (eff == DAEDALUS_SUBSTRATE_AUTO)
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eff = daedalus_recipe_substrate_for(DAEDALUS_KERNEL_H264_IDCT8);
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if (eff == DAEDALUS_SUBSTRATE_QPU && !daedalus_ctx_has_qpu(ctx))
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eff = DAEDALUS_SUBSTRATE_CPU;
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if (eff == DAEDALUS_SUBSTRATE_CPU)
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return dispatch_h264_idct8_cpu(ctx, dst, dst_stride,
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coeffs, n_blocks, meta);
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return dispatch_h264_idct8_qpu(ctx, dst, dst_stride,
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coeffs, n_blocks, meta);
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}
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int daedalus_dispatch_h264_deblock_luma_v(daedalus_ctx *ctx, daedalus_substrate sub,
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