Merge pull request 'h264: V3D shader for qpel mc22 (2D half-pel 'j' position)' (#31) from noether/v3d-shader-h264-qpel-mc22 into main

Reviewed-on: #31

CMakeLists.txt

@@ -361,7 +361,18 @@ if (DAEDALUS_BUILD_VULKAN)
         VERBATIM
     )
 
-    add_custom_target(daedalus_shaders ALL DEPENDS ${NOOP_SPV} ${IDCT8_SPV} ${LPF_SPV} ${MC_SPV} ${LPF8_SPV} ${CDEF_SPV} ${H264DEBLOCK_SPV} ${H264DEBLOCK_H_SPV} ${H264DEBLOCK_CHROMA_V_SPV} ${H264DEBLOCK_CHROMA_H_SPV} ${H264_IDCT4_SPV} ${H264_IDCT8_SPV} ${H264_QPEL_MC20_SPV} ${H264_QPEL_MC02_SPV})
+    set(H264_QPEL_MC22_SPV ${CMAKE_BINARY_DIR}/v3d_h264_qpel_mc22.spv)
+    add_custom_command(
+        OUTPUT ${H264_QPEL_MC22_SPV}
+        COMMAND ${GLSLANG_VALIDATOR} -V --target-env vulkan1.3
+                -o ${H264_QPEL_MC22_SPV}
+                ${CMAKE_SOURCE_DIR}/src/v3d_h264_qpel_mc22.comp
+        DEPENDS ${CMAKE_SOURCE_DIR}/src/v3d_h264_qpel_mc22.comp
+        COMMENT "glslang: v3d_h264_qpel_mc22.comp -> v3d_h264_qpel_mc22.spv"
+        VERBATIM
+    )
+
+    add_custom_target(daedalus_shaders ALL DEPENDS ${NOOP_SPV} ${IDCT8_SPV} ${LPF_SPV} ${MC_SPV} ${LPF8_SPV} ${CDEF_SPV} ${H264DEBLOCK_SPV} ${H264DEBLOCK_H_SPV} ${H264DEBLOCK_CHROMA_V_SPV} ${H264DEBLOCK_CHROMA_H_SPV} ${H264_IDCT4_SPV} ${H264_IDCT8_SPV} ${H264_QPEL_MC20_SPV} ${H264_QPEL_MC02_SPV} ${H264_QPEL_MC22_SPV})
 
     # v3d_runner — reusable Vulkan plumbing.
     add_library(v3d_runner STATIC src/v3d_runner.c)
@@ -501,6 +512,7 @@ if (DAEDALUS_BUILD_VULKAN)
         ${H264_IDCT8_SPV}
         ${H264_QPEL_MC20_SPV}
         ${H264_QPEL_MC02_SPV}
+        ${H264_QPEL_MC22_SPV}
         DESTINATION ${CMAKE_INSTALL_DATADIR}/daedalus-fourier/shaders
     )
 endif()

src/daedalus_core.c

@@ -54,6 +54,8 @@ struct daedalus_ctx {
     v3d_pipeline  h264_qpel_mc20_pipe;
     int           h264_qpel_mc02_pipe_ready;
     v3d_pipeline  h264_qpel_mc02_pipe;
+    int           h264_qpel_mc22_pipe_ready;
+    v3d_pipeline  h264_qpel_mc22_pipe;
 };
 
 daedalus_ctx *daedalus_ctx_create(void)
@@ -115,6 +117,7 @@ void daedalus_ctx_destroy(daedalus_ctx *ctx)
         if (ctx->h264_idct8_pipe_ready)  v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_idct8_pipe);
         if (ctx->h264_qpel_mc20_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc20_pipe);
         if (ctx->h264_qpel_mc02_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc02_pipe);
+        if (ctx->h264_qpel_mc22_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc22_pipe);
         v3d_runner_destroy(ctx->runner);
     }
     free(ctx);
@@ -151,7 +154,7 @@ daedalus_substrate daedalus_recipe_substrate_for(daedalus_kernel k)
     case DAEDALUS_KERNEL_H264_DEBLOCK_CH_INTRA: return DAEDALUS_SUBSTRATE_CPU;
     case DAEDALUS_KERNEL_H264_QPEL_MC20:   return DAEDALUS_SUBSTRATE_QPU;	/* v3d_h264_qpel_mc20.spv */
     case DAEDALUS_KERNEL_H264_QPEL_MC02:   return DAEDALUS_SUBSTRATE_QPU;	/* v3d_h264_qpel_mc02.spv */
-    case DAEDALUS_KERNEL_H264_QPEL_MC22:   return DAEDALUS_SUBSTRATE_CPU;	/* QPU mc22 shader pending (hv lowpass) */
+    case DAEDALUS_KERNEL_H264_QPEL_MC22:   return DAEDALUS_SUBSTRATE_QPU;	/* v3d_h264_qpel_mc22.spv */
     case DAEDALUS_KERNEL_H264_QPEL_MC10:   return DAEDALUS_SUBSTRATE_CPU;	/* ¼-H L2 */
     case DAEDALUS_KERNEL_H264_QPEL_MC30:   return DAEDALUS_SUBSTRATE_CPU;	/* ¾-H L2 */
     case DAEDALUS_KERNEL_H264_QPEL_MC01:   return DAEDALUS_SUBSTRATE_CPU;	/* ¼-V L2 */
@@ -1543,6 +1546,90 @@ fail:
     return -1;
 }
 
+static int dispatch_h264_qpel_mc22_qpu(daedalus_ctx *ctx,
+    uint8_t *dst, const uint8_t *src, size_t stride,
+    size_t n_blocks, const daedalus_h264_qpel_meta *meta)
+{
+    /* 2D HV cascade: rows -2..+10 (13 rows of src) AND cols -2..+10
+     * per row (8 output cols × cols c-2..c+3 → up to col 10).  So
+     * src_max = src_off + 10*stride + 11.
+     * (mc20 needed 7*stride + 11; mc02 needed 10*stride + 8;
+     * mc22 needs MAX of both = 10*stride + 11.) */
+    if (!ctx->h264_qpel_mc22_pipe_ready) {
+        if (v3d_runner_create_pipeline(ctx->runner, "v3d_h264_qpel_mc22.spv",
+                                       3, sizeof(h264_qpel_mc20_pc),
+                                       &ctx->h264_qpel_mc22_pipe) != 0)
+            return -1;
+        ctx->h264_qpel_mc22_pipe_ready = 1;
+    }
+
+    size_t meta_bytes = n_blocks * 4 * sizeof(uint32_t);
+    size_t src_max = 0, dst_max = 0;
+    for (size_t i = 0; i < n_blocks; i++) {
+        size_t s_end = meta[i].src_off + (size_t) 10 * stride + 11;
+        size_t d_end = meta[i].dst_off + (size_t)  7 * stride + 8;
+        if (s_end > src_max) src_max = s_end;
+        if (d_end > dst_max) dst_max = d_end;
+    }
+
+    v3d_buffer bs = {0}, bd = {0}, bm = {0};
+    if (v3d_runner_create_buffer(ctx->runner, src_max,    &bs)) return -1;
+    if (v3d_runner_create_buffer(ctx->runner, dst_max,    &bd)) {
+        v3d_runner_destroy_buffer(ctx->runner, &bs); return -1;
+    }
+    if (v3d_runner_create_buffer(ctx->runner, meta_bytes, &bm)) {
+        v3d_runner_destroy_buffer(ctx->runner, &bd);
+        v3d_runner_destroy_buffer(ctx->runner, &bs); return -1;
+    }
+
+    memcpy(bs.mapped, src, src_max);
+    memcpy(bd.mapped, dst, dst_max);
+    uint32_t *m = bm.mapped;
+    for (size_t i = 0; i < n_blocks; i++) {
+        m[4*i+0] = meta[i].dst_off;
+        m[4*i+1] = meta[i].src_off;
+        m[4*i+2] = 0;
+        m[4*i+3] = 0;
+    }
+
+    v3d_buffer binds[3] = { bs, bd, bm };
+    if (v3d_runner_bind_buffers(ctx->runner, &ctx->h264_qpel_mc22_pipe, binds, 3))
+        goto fail;
+
+    uint32_t wg_count = (uint32_t) n_blocks;
+    h264_qpel_mc20_pc pc = {
+        .n_blocks  = (uint32_t) n_blocks,
+        .stride_u8 = (uint32_t) stride,
+    };
+
+    VkCommandBuffer cb = v3d_runner_alloc_cmdbuf(ctx->runner);
+    if (cb == VK_NULL_HANDLE) goto fail;
+    VkCommandBufferBeginInfo cbbi = { .sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_BEGIN_INFO };
+    vkBeginCommandBuffer(cb, &cbbi);
+    vkCmdBindPipeline(cb, VK_PIPELINE_BIND_POINT_COMPUTE,
+                      ctx->h264_qpel_mc22_pipe.pipeline);
+    vkCmdBindDescriptorSets(cb, VK_PIPELINE_BIND_POINT_COMPUTE,
+                            ctx->h264_qpel_mc22_pipe.layout, 0, 1,
+                            &ctx->h264_qpel_mc22_pipe.desc_set, 0, NULL);
+    vkCmdPushConstants(cb, ctx->h264_qpel_mc22_pipe.layout,
+                       VK_SHADER_STAGE_COMPUTE_BIT, 0, sizeof(pc), &pc);
+    vkCmdDispatch(cb, wg_count, 1, 1);
+    vkEndCommandBuffer(cb);
+    if (v3d_runner_submit_wait(ctx->runner, cb)) goto fail;
+
+    memcpy(dst, bd.mapped, dst_max);
+
+    v3d_runner_destroy_buffer(ctx->runner, &bm);
+    v3d_runner_destroy_buffer(ctx->runner, &bd);
+    v3d_runner_destroy_buffer(ctx->runner, &bs);
+    return 0;
+fail:
+    v3d_runner_destroy_buffer(ctx->runner, &bm);
+    v3d_runner_destroy_buffer(ctx->runner, &bd);
+    v3d_runner_destroy_buffer(ctx->runner, &bs);
+    return -1;
+}
+
 /* -------------------- Public dispatch entry points -------------- */
 
 #define ROUTE_CPU_ONLY(_kernel, _cpu_fn, ...)                                 \
@@ -1776,9 +1863,9 @@ int daedalus_dispatch_h264_qpel_mc22(daedalus_ctx *ctx, daedalus_substrate sub,
         eff = daedalus_recipe_substrate_for(DAEDALUS_KERNEL_H264_QPEL_MC22);
     if (eff == DAEDALUS_SUBSTRATE_QPU && !daedalus_ctx_has_qpu(ctx))
         eff = DAEDALUS_SUBSTRATE_CPU;
-    if (eff == DAEDALUS_SUBSTRATE_QPU)
+    if (eff == DAEDALUS_SUBSTRATE_CPU)
-        return -1;  /* No mc22 QPU shader yet — explicit QPU fast-fails. */
+        return dispatch_h264_qpel_mc22_cpu(ctx, dst, src, stride, n_blocks, meta);
-    return dispatch_h264_qpel_mc22_cpu(ctx, dst, src, stride, n_blocks, meta);
+    return dispatch_h264_qpel_mc22_qpu(ctx, dst, src, stride, n_blocks, meta);
 }
 
 #define DEFINE_QPEL_DISPATCH(suffix, kernel)                                   \

src/v3d_h264_qpel_mc22.comp

@@ -0,0 +1,86 @@
+// daedalus-fourier — H.264 luma qpel mc22 (8x8, 2D half-pel "j" position).
+// V3D 7.1.
+//
+// Cascaded H+V 6-tap per H.264 §8.4.2.2.1 / FFmpeg ff_put_h264_qpel8_mc22_neon:
+//
+//   tmp[r,c] = src[r,c-2] - 5*src[r,c-1] + 20*src[r,c] + 20*src[r,c+1]
+//              - 5*src[r,c+2] + src[r,c+3]                    (int16)
+//
+//   dst[r,c] = clip255((tmp[r-2,c] - 5*tmp[r-1,c] + 20*tmp[r,c]
+//                       + 20*tmp[r+1,c] - 5*tmp[r+2,c] + tmp[r+3,c]
+//                       + 512) >> 10)
+//
+// The +512 >> 10 final scale compensates for both 6-tap scalings.
+// CANNOT just cascade mc20→mc02 because intermediate must be int16
+// (no per-stage clip), so this is a dedicated kernel.
+//
+// Per-lane structure: each lane computes its own (r, c) output by
+// running the FULL cascade — 6 horizontal lowpass int16 values for
+// rows r-2..r+3, then a vertical lowpass on those.  ~50 ALU ops per
+// lane.  No shared memory / barriers needed; V3D L2 absorbs the
+// redundant src reads across lanes.
+//
+// WG layout: 64 lanes / 1 block-per-WG / 1 lane-per-output-pixel
+// (same as mc20 / mc02).
+//
+// License: BSD-2-Clause.
+
+#version 450
+#extension GL_EXT_shader_8bit_storage             : require
+#extension GL_EXT_shader_explicit_arithmetic_types : require
+
+layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in;
+
+layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src;
+layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst;
+layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta;
+
+layout(push_constant) uniform PC {
+    uint n_blocks;
+    uint stride_u8;
+    uint _pad0, _pad1;
+} pc;
+
+// Horizontal 6-tap filter at (row_off, c) — reads src at cols c-2..c+3
+// of the row identified by row_off, returns int16 intermediate (NOT
+// scaled — the v-pass does the +512 >> 10 for both stages).
+int hpel_h(uint row_off, uint c)
+{
+    int s_m2 = int(u_src.src[row_off + c - 2u]);
+    int s_m1 = int(u_src.src[row_off + c - 1u]);
+    int s_0  = int(u_src.src[row_off + c       ]);
+    int s_p1 = int(u_src.src[row_off + c + 1u]);
+    int s_p2 = int(u_src.src[row_off + c + 2u]);
+    int s_p3 = int(u_src.src[row_off + c + 3u]);
+    return s_m2 - 5 * s_m1 + 20 * s_0 + 20 * s_p1 - 5 * s_p2 + s_p3;
+}
+
+void main()
+{
+    uint block_idx = gl_WorkGroupID.x;
+    if (block_idx >= pc.n_blocks) return;
+
+    uint lane = gl_LocalInvocationID.x;
+    uint r = lane >> 3;
+    uint c = lane & 7u;
+
+    uint dst_off = u_meta.meta[block_idx].x;
+    uint src_off = u_meta.meta[block_idx].y;
+    uint stride  = pc.stride_u8;
+
+    // Compute 6 horizontal lowpass values at rows r-2..r+3 (relative
+    // to the output row r) of column c.  src_off+r*stride+c is the
+    // output pixel position; we sample rows r-2..r+3.
+    // Unsigned-safe because src_off >= 2*stride per the caller contract.
+    int t0 = hpel_h(src_off + (r - 2u) * stride, c);
+    int t1 = hpel_h(src_off + (r - 1u) * stride, c);
+    int t2 = hpel_h(src_off +  r       * stride, c);
+    int t3 = hpel_h(src_off + (r + 1u) * stride, c);
+    int t4 = hpel_h(src_off + (r + 2u) * stride, c);
+    int t5 = hpel_h(src_off + (r + 3u) * stride, c);
+
+    int v = t0 - 5 * t1 + 20 * t2 + 20 * t3 - 5 * t4 + t5 + 512;
+    int p = clamp(v >> 10, 0, 255);
+
+    u_dst.dst[dst_off + r * stride + c] = uint8_t(p);
+}