marfrit/daedalus-fourier
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Cycle 7 closed: H.264 IDCT 8x8 = 151 Mblock/s NEON, Phase 4 deferred

Browse Source 
M1: 10000/10000 bit-exact first try (column-major-block lesson
from cycle 6 carried over cleanly).

M3: 151.2 Mblock/s per core. Per-block 6.6 ns. 155x the
1080p30 floor (0.972 Mblock/s req'd).

Phase-1 prediction of R7 = 0.5-0.9 YELLOW/GREEN was WRONG. H.264
IDCT 8x8 is dramatically lighter than VP9 IDCT 8x8 (18.5x faster
NEON):

  VP9 IDCT 8x8: 122 ns/block (Q14 trig + COSPI multiplies)
  H.264 IDCT 8x8: 6.6 ns/block (pure integer butterfly + shifts)

Phase 4 deferred via the cycle 6 lightweight-kernel rationale:
NEON per-block << QPU dispatch floor; offload doesn't help.

Phase 9 lesson updated: H.264 transforms (both 4x4 and 8x8) are
NEON-trivial. Skip ALL H.264 transform cycles for QPU. Target
compute-heavy H.264 kernels only (deblock = cycle 8 next; MC
likely RED).

Cycle 7 = 2nd consecutive "predicted GREEN, measured CPU-only"
result. Forces a sharper view of which kernels QPU can actually
help with: deblock and possibly some VP9 cases.

- tests/h264_idct8_ref.c (column-major C ref)
- tests/bench_neon_h264idct8.c (M1 + M3 bench)
- CMakeLists.txt: cycle 7 bench wiring
- docs/k7_h264idct8_phase3_and_4.md (closure)

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
This commit is contained in:
Markus Fritsche
2026-05-18 14:16:42 +00:00
parent 480f34f6e6
commit db2205d0e3
4 changed files with 412 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
CMakeLists.txt
+8
View File
@@ -112,6 +112,14 @@ add_executable(bench_neon_h264idct4
) )
target_compile_options(bench_neon_h264idct4 PRIVATE -O3 -march=armv8-a+simd) target_compile_options(bench_neon_h264idct4 PRIVATE -O3 -march=armv8-a+simd)
# Cycle 7 — H.264 IDCT 8x8 NEON M3 baseline bench.
add_executable(bench_neon_h264idct8
tests/bench_neon_h264idct8.c
tests/h264_idct8_ref.c
${FFASM_H264IDCT_SOURCES}
)
target_compile_options(bench_neon_h264idct8 PRIVATE -O3 -march=armv8-a+simd)
add_executable(bench_neon_idct add_executable(bench_neon_idct
tests/bench_neon_idct.c tests/bench_neon_idct.c
tests/vp9_idct8_ref.c tests/vp9_idct8_ref.c
docs/k7_h264idct8_phase3_and_4.md
+117
View File
@@ -0,0 +1,117 @@
---
cycle: 7
phase: 3 + 4 (decision: defer Phase 4)
status: closed 2026-05-18 — M1 PASS, M3₇ = 151 Mblock/s, Phase 4 deferred
date_opened: 2026-05-18
date_closed: 2026-05-18
parent: k7_h264idct8_phase1.md
host: hertz
---
# Cycle 7, Phases 3+4 — H.264 IDCT 8×8 NEON baseline + Phase 4 deferral
## M1 + M3
```
=== M1₇ bit-exact (10000 random 8x8 blocks) ===
M1₇ correctness: 10000 / 10000 blocks bit-exact (100.0000%)
=== M3₇ NEON throughput ===
total blocks: 62 074 880
elapsed (kernel)=0.411 s
throughput = 151.2 Mblock/s
per-block = 6.6 ns
H.264 1080p30 IDCT8 floor: 155.53x margin (0.972 Mblock/s req'd)
```
M1 PASS first try — the column-major-block convention from cycle
6 Phase 9 was correctly carried over and tested with a sharply
more complex butterfly (3 sub-stages). No debugging needed.
## Surprise: H.264 IDCT 8×8 is dramatically lighter than VP9 IDCT 8×8
| | VP9 IDCT 8×8 (cycle 1) | H.264 IDCT 8×8 (cycle 7) |
|---|---|---|
| NEON M3 (1 core) | 8.171 Mblock/s | **151.177 Mblock/s** (18.5× faster) |
| Per-block ns | 122 | **6.6** |
| Math | Q14 trig × COSPI constants | Pure integer butterfly + shifts |
| NEON instruction shape | Multiply-heavy | Add-and-shift |
The H.264 IDCT uses an INTEGER transform with only additions,
subtractions, and right-shifts — no multiplies. NEON's
add/sub/shift throughput is near-peak (1 cycle per op on most
ports). VP9's IDCT requires Q14 multiplies for the cosine-related
transform, which are ~4× slower per op on NEON.
**My Phase 1 prediction of R₇ ≈ 0.5-0.9 was wrong.** I extrapolated
from cycle 1 (VP9 IDCT 8×8) which I assumed was the closest analog
— it's the same data shape (64 coefs, 8×8 output) but the compute
shape is completely different. H.264's pure-integer butterfly is
much cheaper than VP9's trig butterfly.
## Phase 4 deferral (same pattern as cycle 6)
Per the cycle 6 Phase 9 lesson ("for any cycle with NEON per-block
< ~30 ns, predict deep RED and defer Phase 4 unless there's a
specific structural QPU advantage"):
- NEON 151 Mblock/s on a single core
- QPU per-block floor ~250 ns (cycle 1 scaling) → ~4 Mblock/s
- R₇ predicted = 4 / 151 = **0.026 → deep RED**
- 30fps@1080p floor passed by 155× on a single core
- No realistic deployment benefit from QPU offload
**Phase 4 deferred. Cycle 7 closed.**
## Recipe verdict
**H.264 IDCT 8×8 stays on CPU.** Same recipe slot as cycle 6
(H.264 IDCT 4×4): trivially fast on NEON, no need for QPU help.
The public API will route through `daedalus_dispatch_*` CPU paths
when these kernel slots are added.
## Phase 9 lesson (cycle 6 + 7 combined)
**H.264 transforms are NEON-trivial.** Both 4×4 (5.7 ns/block,
175 Mblock/s) and 8×8 (6.6 ns/block, 151 Mblock/s) are dominated
by memory bandwidth, not compute. The transform math is too
lightweight to make QPU offload worthwhile.
Implications for cycle-selection going forward:
- **Skip all H.264 transform cycles** (chroma IDCT 4×4 in cycle 8
was originally planned; defer all transform work to CPU-only).
- **Target compute-heavy H.264 kernels** where QPU might compete:
- **Deblock** (cycle 8, reordered up): analogous to VP9 LPF
which was GREEN. Predicted YELLOW or GREEN.
- **Luma qpel MC** (6-tap): analogous to VP9 8-tap MC which
was RED. Predicted RED.
- **Chroma MC** (4-tap): even lighter than luma. Predicted RED.
So the practical H.264 QPU plan: **only build cycle 8 (deblock)**.
Other H.264 kernels go CPU-only via the public API.
This is a much narrower scope than originally envisioned in
`project_h264_scope_added`. The end deliverable still meets the
user goal (Pi 5 + daedalus-fourier decoding H.264) — just with
the QPU only helping the deblock stage. Most of H.264 stays on
NEON because NEON is already so fast.
## Codec coverage state after cycle 7
| Codec | Kernel | Recipe | Status |
|---|---|---|---|
| VP9 | IDCT 8x8 | QPU | cycle 1 closed |
| VP9 | LPF wd=4 | QPU | cycle 2 closed |
| VP9 | MC 8h | CPU | cycle 3 closed |
| VP9 | LPF wd=8 | QPU | cycle 4 closed |
| AV1 | CDEF 8x8 | CPU | cycle 5 closed |
| H.264 | IDCT 4x4 | CPU | cycle 6 closed (this session) |
| H.264 | IDCT 8x8 | CPU | cycle 7 closed (this session) |
| H.264 | Deblock | TBD | cycle 8 next |
| H.264 | MC | CPU | future (predicted RED) |
| H.264 | Chroma MC | CPU | future (predicted RED) |
7 cycles closed. 3 deployed on QPU (VP9 cycles 1+2+4). 4 stay on
CPU. Deployment recipe matrix grows but stays narrowly focused on
QPU-wins.
tests/bench_neon_h264idct8.c
+195
View File
@@ -0,0 +1,195 @@
/*
* Cycle 7 Phase 3 — NEON M3 baseline for H.264 IDCT 8x8 + add.
*
* Tests ff_h264_idct8_add_neon against the standalone C reference
* (M1) and measures throughput (M3).
*/
#define _POSIX_C_SOURCE 200809L
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <stddef.h>
#include <string.h>
#include <time.h>
#include <getopt.h>
extern void daedalus_h264_idct8_add_ref(uint8_t *dst, int16_t *block, ptrdiff_t stride);
extern void ff_h264_idct8_add_neon(uint8_t *dst, int16_t *block, ptrdiff_t stride);
#define DST_STRIDE 16
#define DST_ROWS 8
#define DST_BYTES (DST_ROWS * DST_STRIDE)
#define BLOCK_INT16 64
static uint64_t xs_state;
static inline uint64_t xs(void) {
uint64_t x = xs_state;
x ^= x << 13; x ^= x >> 7; x ^= x << 17;
return xs_state = x;
}
static void gen_block(int16_t b[BLOCK_INT16])
{
memset(b, 0, BLOCK_INT16 * sizeof(int16_t));
int n_nonzero = 1 + (int)(xs() % 24);
for (int i = 0; i < n_nonzero; i++) {
int pos = (int)(xs() % BLOCK_INT16);
int16_t v = (int16_t)((int)(xs() % 2048) - 1024);
b[pos] = v;
}
}
static double now_seconds(void) {
struct timespec ts;
clock_gettime(CLOCK_MONOTONIC_RAW, &ts);
return ts.tv_sec + ts.tv_nsec * 1e-9;
}
static int correctness_check(uint64_t seed, int n)
{
xs_state = seed ? seed : 0xc0de8000ULL;
int mismatches = 0, prints = 0;
int16_t block_a[BLOCK_INT16], block_b[BLOCK_INT16], block_saved[BLOCK_INT16];
uint8_t dst_a[DST_BYTES], dst_b[DST_BYTES], dst_initial[DST_BYTES];
for (int i = 0; i < n; i++) {
gen_block(block_a);
memcpy(block_b, block_a, sizeof(block_a));
memcpy(block_saved, block_a, sizeof(block_a));
for (int r = 0; r < 8; r++)
for (int c = 0; c < 8; c++)
dst_a[r * DST_STRIDE + c] = dst_b[r * DST_STRIDE + c] = (uint8_t)(xs() & 0xff);
memcpy(dst_initial, dst_a, DST_BYTES);
daedalus_h264_idct8_add_ref(dst_a, block_a, DST_STRIDE);
ff_h264_idct8_add_neon(dst_b, block_b, DST_STRIDE);
int diff = 0;
for (int r = 0; r < 8; r++)
for (int c = 0; c < 8; c++)
if (dst_a[r*DST_STRIDE + c] != dst_b[r*DST_STRIDE + c]) diff++;
if (diff) {
if (prints < 3) {
fprintf(stderr, "MISMATCH block %d (%d/64 pix diff):\n", i, diff);
fprintf(stderr, " block (column-major view as cols):");
for (int c = 0; c < 8; c++) {
fprintf(stderr, "\n c%d ", c);
for (int r = 0; r < 8; r++) fprintf(stderr, "%6d ", block_saved[c*8 + r]);
}
fprintf(stderr, "\n ref dst:");
for (int r = 0; r < 8; r++) {
fprintf(stderr, "\n r%d ", r);
for (int c = 0; c < 8; c++) fprintf(stderr, "%3u ", dst_a[r*DST_STRIDE+c]);
}
fprintf(stderr, "\n neon dst:");
for (int r = 0; r < 8; r++) {
fprintf(stderr, "\n r%d ", r);
for (int c = 0; c < 8; c++) fprintf(stderr, "%3u ", dst_b[r*DST_STRIDE+c]);
}
fprintf(stderr, "\n");
prints++;
}
mismatches++;
}
}
printf("M1₇ correctness: %d / %d blocks bit-exact (%.4f%%)\n",
n - mismatches, n, 100.0 * (n - mismatches) / n);
return mismatches;
}
static void throughput_neon(uint64_t seed, int n_blocks, double duration_s)
{
xs_state = seed ? seed : 0xc0de8000ULL;
int16_t *master_blocks = malloc((size_t) n_blocks * BLOCK_INT16 * sizeof(int16_t));
int16_t *work_blocks = malloc((size_t) n_blocks * BLOCK_INT16 * sizeof(int16_t));
uint8_t *master_dst = malloc((size_t) n_blocks * 64);
uint8_t *work_dst = malloc((size_t) n_blocks * 64);
if (!master_blocks || !work_blocks || !master_dst || !work_dst) {
fprintf(stderr, "alloc fail\n"); exit(1);
}
for (int i = 0; i < n_blocks; i++) {
gen_block(master_blocks + i * BLOCK_INT16);
for (int j = 0; j < 64; j++) master_dst[i * 64 + j] = (uint8_t)(xs() & 0xff);
}
memcpy(work_blocks, master_blocks, (size_t) n_blocks * BLOCK_INT16 * sizeof(int16_t));
memcpy(work_dst, master_dst, (size_t) n_blocks * 64);
for (int i = 0; i < n_blocks; i++)
ff_h264_idct8_add_neon(work_dst + i * 64, work_blocks + i * BLOCK_INT16, 8);
double t0 = now_seconds();
double t_end = t0 + duration_s;
uint64_t done = 0;
while (now_seconds() < t_end) {
memcpy(work_blocks, master_blocks, (size_t) n_blocks * BLOCK_INT16 * sizeof(int16_t));
memcpy(work_dst, master_dst, (size_t) n_blocks * 64);
for (int i = 0; i < n_blocks; i++)
ff_h264_idct8_add_neon(work_dst + i * 64, work_blocks + i * BLOCK_INT16, 8);
done += n_blocks;
}
double elapsed = now_seconds() - t0;
int iters = (int)(done / n_blocks);
double s0 = now_seconds();
for (int i = 0; i < iters; i++) {
memcpy(work_blocks, master_blocks, (size_t) n_blocks * BLOCK_INT16 * sizeof(int16_t));
memcpy(work_dst, master_dst, (size_t) n_blocks * 64);
}
double s1 = now_seconds();
double kernel_seconds = elapsed - (s1 - s0);
double mbps = done / kernel_seconds / 1e6;
printf("M3₇ NEON throughput:\n");
printf(" blocks/batch: %d\n", n_blocks);
printf(" batches done: %d\n", iters);
printf(" total blocks: %llu\n", (unsigned long long) done);
printf(" elapsed (kernel)=%.6f s\n", kernel_seconds);
printf(" throughput = %.3f Mblock/s\n", mbps);
printf(" per-block = %.1f ns\n", kernel_seconds / done * 1e9);
printf(" H.264 1080p30 IDCT8 floor: %.2fx margin (0.972 Mblock/s req'd)\n", mbps / 0.972);
free(master_blocks); free(work_blocks); free(master_dst); free(work_dst);
}
int main(int argc, char **argv)
{
int n_blocks = 65536;
double duration = 5.0;
uint64_t seed = 0;
int do_correctness = 1;
static struct option opts[] = {
{"blocks", required_argument, 0, 'b'},
{"duration", required_argument, 0, 'd'},
{"seed", required_argument, 0, 's'},
{"no-correctness", no_argument, 0, 'C'},
{0,0,0,0}
};
for (int c; (c = getopt_long(argc, argv, "b:d:s:C", opts, 0)) != -1;) {
switch (c) {
case 'b': n_blocks = atoi(optarg); break;
case 'd': duration = atof(optarg); break;
case 's': seed = strtoull(optarg, 0, 0); break;
case 'C': do_correctness = 0; break;
default: return 2;
}
}
if (do_correctness) {
printf("=== M1₇ bit-exact (10000 random 8x8 blocks) ===\n");
int mis = correctness_check(seed, 10000);
if (mis != 0) {
fprintf(stderr, "M1 gate FAILED — refusing to measure throughput.\n");
return 1;
}
printf("\n");
}
printf("=== M3₇ NEON throughput ===\n");
throughput_neon(seed, n_blocks, duration);
return 0;
}
tests/h264_idct8_ref.c
+92
View File
@@ -0,0 +1,92 @@
/*
* Standalone bit-exact C reference for H.264 8x8 inverse integer
* transform + add. Algorithm per H.264 spec §8.5.13.2 (8x8 IT).
*
* Mirrors FFmpeg `ff_h264_idct8_add_neon` in
* external/ffmpeg-snapshot/libavcodec/aarch64/h264idct_neon.S
* line 267. Block is COLUMN-MAJOR (per cycle 6 Phase 9 lesson):
* block[c*8 + r] = coefficient at (row=r, col=c).
*
* Signature:
* void(uint8_t *dst, int16_t *block, ptrdiff_t stride);
*
* Zeroes block after transform (per FFmpeg convention).
*
* License: LGPL-2.1-or-later.
*/
#include <stdint.h>
#include <stddef.h>
#include <string.h>
static inline int clip_u8(int v) { return v < 0 ? 0 : v > 255 ? 255 : v; }
/* 1D 8-element H.264 IT butterfly per H.264 §8.5.13.2.
* Takes d[0..7], produces g[0..7]. */
static inline void h264_idct8_butterfly(const int d[8], int g[8])
{
int e[8], f[8];
e[0] = d[0] + d[4];
e[1] = -d[3] + d[5] - d[7] - (d[7] >> 1);
e[2] = d[0] - d[4];
e[3] = d[1] + d[7] - d[3] - (d[3] >> 1);
e[4] = (d[2] >> 1) - d[6];
e[5] = -d[1] + d[7] + d[5] + (d[5] >> 1);
e[6] = d[2] + (d[6] >> 1);
e[7] = d[3] + d[5] + d[1] + (d[1] >> 1);
f[0] = e[0] + e[6];
f[1] = e[1] + (e[7] >> 2);
f[2] = e[2] + e[4];
f[3] = e[3] + (e[5] >> 2);
f[4] = e[2] - e[4];
f[5] = (e[3] >> 2) - e[5];
f[6] = e[0] - e[6];
f[7] = e[7] - (e[1] >> 2);
g[0] = f[0] + f[7];
g[1] = f[2] + f[5];
g[2] = f[4] + f[3];
g[3] = f[6] + f[1];
g[4] = f[6] - f[1];
g[5] = f[4] - f[3];
g[6] = f[2] - f[5];
g[7] = f[0] - f[7];
}
void daedalus_h264_idct8_add_ref(uint8_t *dst, int16_t *block, ptrdiff_t stride)
{
int tmp[8][8];
/* Row pass FIRST. Read block as column-major (block[c*8 + r]).
* d[c] for row r = block[c*8 + r] = (row=r, col=c) per the
* H.264/FFmpeg column-major convention from cycle 6 phase 9. */
for (int r = 0; r < 8; r++) {
int d[8];
for (int c = 0; c < 8; c++) d[c] = block[c*8 + r];
int g[8];
h264_idct8_butterfly(d, g);
for (int c = 0; c < 8; c++) tmp[r][c] = g[c];
}
/* Column pass NEXT (on row-major tmp). */
int col_out[8][8];
for (int c = 0; c < 8; c++) {
int d[8];
for (int r = 0; r < 8; r++) d[r] = tmp[r][c];
int g[8];
h264_idct8_butterfly(d, g);
for (int r = 0; r < 8; r++) col_out[r][c] = g[r];
}
/* Round (+32) >> 6, add to dst, clip to u8. */
for (int r = 0; r < 8; r++) {
for (int c = 0; c < 8; c++) {
int rounded = (col_out[r][c] + 32) >> 6;
dst[r * stride + c] = (uint8_t) clip_u8(dst[r * stride + c] + rounded);
}
}
/* FFmpeg convention: zero the block after transform. */
memset(block, 0, 64 * sizeof(int16_t));
}