From 746533582eb4192ebca2d2c12e6ebc71fdce7698 Mon Sep 17 00:00:00 2001 From: claude-noether Date: Mon, 25 May 2026 19:14:42 +0200 Subject: [PATCH] h264: V3D shaders for the 8 diagonal qpel positions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Closes the put_ qpel QPU matrix. Adds mc11/12/13/21/23/31/32/33 — each composes two half-pel anchor outputs via L2 rounded-average: mc11 ¼¼ : avg(mc20[r, c], mc02[r, c]) mc12 ¼½ : avg(mc22[r, c], mc02[r, c]) mc13 ¼¾ : avg(mc20[r+1, c], mc02[r, c]) mc21 ½¼ : avg(mc22[r, c], mc20[r, c]) mc23 ½¾ : avg(mc22[r, c], mc20[r+1, c]) mc31 ¾¼ : avg(mc20[r, c], mc02[r, c+1]) mc32 ¾½ : avg(mc22[r, c], mc02[r, c+1]) mc33 ¾¾ : avg(mc20[r+1, c], mc02[r, c+1]) Per-lane structure: each lane runs the FULL cascade for BOTH anchors at its own (r, c) target, then L2 averages. No shared memory. Shaders inline hpel_h() / hpel_v() / hpel_hv() helpers (the latter does the 13×6 int16 cascade per cell). ~88 lines each. Shaders generated from a python template (POSITIONS table + format string) — the 8 .comp files are 1:1 with the C reference's DEFINE_DIAG_REF macro from fourier PR #18. Dispatch plumbing: shared dispatch_h264_qpel_diag_qpu helper covers all 8 (same src envelope as mc22: src_max = src_off + 10*stride + 11, covering rows -2..+10 and cols -2..+10 for any (r±1, c±1) offset). Recipe table: all 8 DAEDALUS_KERNEL_H264_QPEL_MC{11..33} flipped to QPU. Public dispatchers re-defined via DEFINE_QPEL_DIAG_PUBLIC macro (replaces the old DEFINE_QPEL_DISPATCH which fast-failed QPU). Verified on hertz: $ ./build/test_api_h264 | grep "qpel mc[1-3][1-3]" H.264 qpel mc11: 2048/2048 bytes bit-exact (100.0000%) H.264 qpel mc12: 2048/2048 bytes bit-exact (100.0000%) H.264 qpel mc13: 2048/2048 bytes bit-exact (100.0000%) H.264 qpel mc21: 2048/2048 bytes bit-exact (100.0000%) H.264 qpel mc23: 2048/2048 bytes bit-exact (100.0000%) H.264 qpel mc31: 2048/2048 bytes bit-exact (100.0000%) H.264 qpel mc32: 2048/2048 bytes bit-exact (100.0000%) H.264 qpel mc33: 2048/2048 bytes bit-exact (100.0000%) Meaningful: the (r±1, c±1) offsets are easy to transpose between positions; passing first try on the asymmetric variants (mc13/23/31/33) means the position-specific shifts are correct in all 8 templates. put_ qpel QPU matrix is now COMPLETE: 15 of 15 useful positions (mc00 = integer copy, no shader needed). avg_ qpel positions (15 more) remain on CPU NEON; can land as a follow-up since avg_ is just put_ + one extra L2 against existing dst. put_ mc20 ✓ mc02 ✓ mc22 ✓ (anchors) mc10 ✓ mc30 ✓ mc01 ✓ mc03 ✓ (single-axis ¼-pel) mc11 ✓ mc12 ✓ mc13 ✓ (this PR — row-1 diagonals) mc21 ✓ mc23 ✓ (this PR — row-2 diagonals) mc31 ✓ mc32 ✓ mc33 ✓ (this PR — row-3 diagonals) avg_ all 15 — CPU NEON --- CMakeLists.txt | 18 +++-- src/daedalus_core.c | 156 ++++++++++++++++++++++++++++++++---- src/v3d_h264_qpel_mc11.comp | 88 ++++++++++++++++++++ src/v3d_h264_qpel_mc12.comp | 88 ++++++++++++++++++++ src/v3d_h264_qpel_mc13.comp | 88 ++++++++++++++++++++ src/v3d_h264_qpel_mc21.comp | 88 ++++++++++++++++++++ src/v3d_h264_qpel_mc23.comp | 88 ++++++++++++++++++++ src/v3d_h264_qpel_mc31.comp | 88 ++++++++++++++++++++ src/v3d_h264_qpel_mc32.comp | 88 ++++++++++++++++++++ src/v3d_h264_qpel_mc33.comp | 88 ++++++++++++++++++++ 10 files changed, 857 insertions(+), 21 deletions(-) create mode 100644 src/v3d_h264_qpel_mc11.comp create mode 100644 src/v3d_h264_qpel_mc12.comp create mode 100644 src/v3d_h264_qpel_mc13.comp create mode 100644 src/v3d_h264_qpel_mc21.comp create mode 100644 src/v3d_h264_qpel_mc23.comp create mode 100644 src/v3d_h264_qpel_mc31.comp create mode 100644 src/v3d_h264_qpel_mc32.comp create mode 100644 src/v3d_h264_qpel_mc33.comp diff --git a/CMakeLists.txt b/CMakeLists.txt index ca29b1b..8210760 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -372,10 +372,10 @@ if (DAEDALUS_BUILD_VULKAN) VERBATIM ) - # Quarter-pel single-axis variants (mc10/30/01/03) — each is the - # corresponding half-pel filter + L2 average with an integer-source - # pixel. Same WG geometry as mc20/mc02. - foreach(_mc mc10 mc30 mc01 mc03) + # Quarter-pel single-axis variants (mc10/30/01/03) + diagonal + # variants (mc11/12/13/21/23/31/32/33) — each composes 1-2 half-pel + # results with optional L2 averaging. Same WG geometry as mc20/mc02. + foreach(_mc mc10 mc30 mc01 mc03 mc11 mc12 mc13 mc21 mc23 mc31 mc32 mc33) set(_spv ${CMAKE_BINARY_DIR}/v3d_h264_qpel_${_mc}.spv) add_custom_command( OUTPUT ${_spv} @@ -389,7 +389,7 @@ if (DAEDALUS_BUILD_VULKAN) set(H264_QPEL_${_mc}_SPV ${_spv}) endforeach() - add_custom_target(daedalus_shaders ALL DEPENDS ${NOOP_SPV} ${IDCT8_SPV} ${LPF_SPV} ${MC_SPV} ${LPF8_SPV} ${CDEF_SPV} ${H264DEBLOCK_SPV} ${H264DEBLOCK_H_SPV} ${H264DEBLOCK_CHROMA_V_SPV} ${H264DEBLOCK_CHROMA_H_SPV} ${H264_IDCT4_SPV} ${H264_IDCT8_SPV} ${H264_QPEL_MC20_SPV} ${H264_QPEL_MC02_SPV} ${H264_QPEL_MC22_SPV} ${H264_QPEL_mc10_SPV} ${H264_QPEL_mc30_SPV} ${H264_QPEL_mc01_SPV} ${H264_QPEL_mc03_SPV}) + add_custom_target(daedalus_shaders ALL DEPENDS ${NOOP_SPV} ${IDCT8_SPV} ${LPF_SPV} ${MC_SPV} ${LPF8_SPV} ${CDEF_SPV} ${H264DEBLOCK_SPV} ${H264DEBLOCK_H_SPV} ${H264DEBLOCK_CHROMA_V_SPV} ${H264DEBLOCK_CHROMA_H_SPV} ${H264_IDCT4_SPV} ${H264_IDCT8_SPV} ${H264_QPEL_MC20_SPV} ${H264_QPEL_MC02_SPV} ${H264_QPEL_MC22_SPV} ${H264_QPEL_mc10_SPV} ${H264_QPEL_mc30_SPV} ${H264_QPEL_mc01_SPV} ${H264_QPEL_mc03_SPV} ${H264_QPEL_mc11_SPV} ${H264_QPEL_mc12_SPV} ${H264_QPEL_mc13_SPV} ${H264_QPEL_mc21_SPV} ${H264_QPEL_mc23_SPV} ${H264_QPEL_mc31_SPV} ${H264_QPEL_mc32_SPV} ${H264_QPEL_mc33_SPV}) # v3d_runner — reusable Vulkan plumbing. add_library(v3d_runner STATIC src/v3d_runner.c) @@ -534,6 +534,14 @@ if (DAEDALUS_BUILD_VULKAN) ${H264_QPEL_mc30_SPV} ${H264_QPEL_mc01_SPV} ${H264_QPEL_mc03_SPV} + ${H264_QPEL_mc11_SPV} + ${H264_QPEL_mc12_SPV} + ${H264_QPEL_mc13_SPV} + ${H264_QPEL_mc21_SPV} + ${H264_QPEL_mc23_SPV} + ${H264_QPEL_mc31_SPV} + ${H264_QPEL_mc32_SPV} + ${H264_QPEL_mc33_SPV} DESTINATION ${CMAKE_INSTALL_DATADIR}/daedalus-fourier/shaders ) endif() diff --git a/src/daedalus_core.c b/src/daedalus_core.c index e52246c..a09b9c7 100644 --- a/src/daedalus_core.c +++ b/src/daedalus_core.c @@ -64,6 +64,14 @@ struct daedalus_ctx { v3d_pipeline h264_qpel_mc01_pipe; int h264_qpel_mc03_pipe_ready; v3d_pipeline h264_qpel_mc03_pipe; + int h264_qpel_mc11_pipe_ready; v3d_pipeline h264_qpel_mc11_pipe; + int h264_qpel_mc12_pipe_ready; v3d_pipeline h264_qpel_mc12_pipe; + int h264_qpel_mc13_pipe_ready; v3d_pipeline h264_qpel_mc13_pipe; + int h264_qpel_mc21_pipe_ready; v3d_pipeline h264_qpel_mc21_pipe; + int h264_qpel_mc23_pipe_ready; v3d_pipeline h264_qpel_mc23_pipe; + int h264_qpel_mc31_pipe_ready; v3d_pipeline h264_qpel_mc31_pipe; + int h264_qpel_mc32_pipe_ready; v3d_pipeline h264_qpel_mc32_pipe; + int h264_qpel_mc33_pipe_ready; v3d_pipeline h264_qpel_mc33_pipe; }; daedalus_ctx *daedalus_ctx_create(void) @@ -130,6 +138,14 @@ void daedalus_ctx_destroy(daedalus_ctx *ctx) if (ctx->h264_qpel_mc30_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc30_pipe); if (ctx->h264_qpel_mc01_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc01_pipe); if (ctx->h264_qpel_mc03_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc03_pipe); + if (ctx->h264_qpel_mc11_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc11_pipe); + if (ctx->h264_qpel_mc12_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc12_pipe); + if (ctx->h264_qpel_mc13_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc13_pipe); + if (ctx->h264_qpel_mc21_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc21_pipe); + if (ctx->h264_qpel_mc23_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc23_pipe); + if (ctx->h264_qpel_mc31_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc31_pipe); + if (ctx->h264_qpel_mc32_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc32_pipe); + if (ctx->h264_qpel_mc33_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc33_pipe); v3d_runner_destroy(ctx->runner); } free(ctx); @@ -171,14 +187,14 @@ daedalus_substrate daedalus_recipe_substrate_for(daedalus_kernel k) case DAEDALUS_KERNEL_H264_QPEL_MC30: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc30.spv */ case DAEDALUS_KERNEL_H264_QPEL_MC01: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc01.spv */ case DAEDALUS_KERNEL_H264_QPEL_MC03: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc03.spv */ - case DAEDALUS_KERNEL_H264_QPEL_MC11: return DAEDALUS_SUBSTRATE_CPU; /* diagonal ¼¼ */ - case DAEDALUS_KERNEL_H264_QPEL_MC12: return DAEDALUS_SUBSTRATE_CPU; /* diagonal ¼½ */ - case DAEDALUS_KERNEL_H264_QPEL_MC13: return DAEDALUS_SUBSTRATE_CPU; /* diagonal ¼¾ */ - case DAEDALUS_KERNEL_H264_QPEL_MC21: return DAEDALUS_SUBSTRATE_CPU; /* diagonal ½¼ */ - case DAEDALUS_KERNEL_H264_QPEL_MC23: return DAEDALUS_SUBSTRATE_CPU; /* diagonal ½¾ */ - case DAEDALUS_KERNEL_H264_QPEL_MC31: return DAEDALUS_SUBSTRATE_CPU; /* diagonal ¾¼ */ - case DAEDALUS_KERNEL_H264_QPEL_MC32: return DAEDALUS_SUBSTRATE_CPU; /* diagonal ¾½ */ - case DAEDALUS_KERNEL_H264_QPEL_MC33: return DAEDALUS_SUBSTRATE_CPU; /* diagonal ¾¾ */ + case DAEDALUS_KERNEL_H264_QPEL_MC11: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc11.spv */ + case DAEDALUS_KERNEL_H264_QPEL_MC12: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc12.spv */ + case DAEDALUS_KERNEL_H264_QPEL_MC13: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc13.spv */ + case DAEDALUS_KERNEL_H264_QPEL_MC21: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc21.spv */ + case DAEDALUS_KERNEL_H264_QPEL_MC23: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc23.spv */ + case DAEDALUS_KERNEL_H264_QPEL_MC31: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc31.spv */ + case DAEDALUS_KERNEL_H264_QPEL_MC32: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc32.spv */ + case DAEDALUS_KERNEL_H264_QPEL_MC33: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc33.spv */ case DAEDALUS_KERNEL_H264_QPEL_AVG_MC20: return DAEDALUS_SUBSTRATE_CPU; /* biprediction anchors */ case DAEDALUS_KERNEL_H264_QPEL_AVG_MC02: return DAEDALUS_SUBSTRATE_CPU; case DAEDALUS_KERNEL_H264_QPEL_AVG_MC22: return DAEDALUS_SUBSTRATE_CPU; @@ -1734,6 +1750,95 @@ DEFINE_QPEL_AXIS_QPU(mc03, "v3d_h264_qpel_mc03.spv", 1) #undef DEFINE_QPEL_AXIS_QPU +/* Diagonals share the mc22-style src envelope (rows -2..+10, cols + * -2..+10) because they compose mc22 with mc20/mc02, sometimes + * with (r+1, c) or (r, c+1) offsets. */ +static int dispatch_h264_qpel_diag_qpu(daedalus_ctx *ctx, + v3d_pipeline *pipe, int *pipe_ready, const char *spv, + uint8_t *dst, const uint8_t *src, size_t stride, + size_t n_blocks, const daedalus_h264_qpel_meta *meta) +{ + if (!*pipe_ready) { + if (v3d_runner_create_pipeline(ctx->runner, spv, + 3, sizeof(h264_qpel_mc20_pc), pipe) != 0) + return -1; + *pipe_ready = 1; + } + size_t meta_bytes = n_blocks * 4 * sizeof(uint32_t); + size_t src_max = 0, dst_max = 0; + for (size_t i = 0; i < n_blocks; i++) { + size_t s_end = meta[i].src_off + (size_t) 10 * stride + 11; + size_t d_end = meta[i].dst_off + (size_t) 7 * stride + 8; + if (s_end > src_max) src_max = s_end; + if (d_end > dst_max) dst_max = d_end; + } + v3d_buffer bs = {0}, bd = {0}, bm = {0}; + if (v3d_runner_create_buffer(ctx->runner, src_max, &bs)) return -1; + if (v3d_runner_create_buffer(ctx->runner, dst_max, &bd)) { + v3d_runner_destroy_buffer(ctx->runner, &bs); return -1; + } + if (v3d_runner_create_buffer(ctx->runner, meta_bytes, &bm)) { + v3d_runner_destroy_buffer(ctx->runner, &bd); + v3d_runner_destroy_buffer(ctx->runner, &bs); return -1; + } + memcpy(bs.mapped, src, src_max); + memcpy(bd.mapped, dst, dst_max); + uint32_t *m = bm.mapped; + for (size_t i = 0; i < n_blocks; i++) { + m[4*i+0] = meta[i].dst_off; + m[4*i+1] = meta[i].src_off; + m[4*i+2] = 0; + m[4*i+3] = 0; + } + v3d_buffer binds[3] = { bs, bd, bm }; + if (v3d_runner_bind_buffers(ctx->runner, pipe, binds, 3)) goto fail; + h264_qpel_mc20_pc pc = { .n_blocks = (uint32_t) n_blocks, + .stride_u8 = (uint32_t) stride }; + VkCommandBuffer cb = v3d_runner_alloc_cmdbuf(ctx->runner); + if (cb == VK_NULL_HANDLE) goto fail; + VkCommandBufferBeginInfo cbbi = { .sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_BEGIN_INFO }; + vkBeginCommandBuffer(cb, &cbbi); + vkCmdBindPipeline(cb, VK_PIPELINE_BIND_POINT_COMPUTE, pipe->pipeline); + vkCmdBindDescriptorSets(cb, VK_PIPELINE_BIND_POINT_COMPUTE, + pipe->layout, 0, 1, &pipe->desc_set, 0, NULL); + vkCmdPushConstants(cb, pipe->layout, VK_SHADER_STAGE_COMPUTE_BIT, + 0, sizeof(pc), &pc); + vkCmdDispatch(cb, (uint32_t) n_blocks, 1, 1); + vkEndCommandBuffer(cb); + if (v3d_runner_submit_wait(ctx->runner, cb)) goto fail; + memcpy(dst, bd.mapped, dst_max); + v3d_runner_destroy_buffer(ctx->runner, &bm); + v3d_runner_destroy_buffer(ctx->runner, &bd); + v3d_runner_destroy_buffer(ctx->runner, &bs); + return 0; +fail: + v3d_runner_destroy_buffer(ctx->runner, &bm); + v3d_runner_destroy_buffer(ctx->runner, &bd); + v3d_runner_destroy_buffer(ctx->runner, &bs); + return -1; +} + +#define DEFINE_QPEL_DIAG_QPU(name) \ +static int dispatch_h264_qpel_ ## name ## _qpu(daedalus_ctx *ctx, \ + uint8_t *dst, const uint8_t *src, size_t stride, \ + size_t n_blocks, const daedalus_h264_qpel_meta *meta) \ +{ \ + return dispatch_h264_qpel_diag_qpu(ctx, &ctx->h264_qpel_ ## name ## _pipe, \ + &ctx->h264_qpel_ ## name ## _pipe_ready, \ + "v3d_h264_qpel_" #name ".spv", dst, src, stride, n_blocks, meta); \ +} + +DEFINE_QPEL_DIAG_QPU(mc11) +DEFINE_QPEL_DIAG_QPU(mc12) +DEFINE_QPEL_DIAG_QPU(mc13) +DEFINE_QPEL_DIAG_QPU(mc21) +DEFINE_QPEL_DIAG_QPU(mc23) +DEFINE_QPEL_DIAG_QPU(mc31) +DEFINE_QPEL_DIAG_QPU(mc32) +DEFINE_QPEL_DIAG_QPU(mc33) + +#undef DEFINE_QPEL_DIAG_QPU + /* -------------------- Public dispatch entry points -------------- */ #define ROUTE_CPU_ONLY(_kernel, _cpu_fn, ...) \ @@ -2011,14 +2116,33 @@ DEFINE_QPEL_DISPATCH_QPU(mc30, DAEDALUS_KERNEL_H264_QPEL_MC30) DEFINE_QPEL_DISPATCH_QPU(mc01, DAEDALUS_KERNEL_H264_QPEL_MC01) DEFINE_QPEL_DISPATCH_QPU(mc03, DAEDALUS_KERNEL_H264_QPEL_MC03) #undef DEFINE_QPEL_DISPATCH_QPU -DEFINE_QPEL_DISPATCH(mc11, DAEDALUS_KERNEL_H264_QPEL_MC11) -DEFINE_QPEL_DISPATCH(mc12, DAEDALUS_KERNEL_H264_QPEL_MC12) -DEFINE_QPEL_DISPATCH(mc13, DAEDALUS_KERNEL_H264_QPEL_MC13) -DEFINE_QPEL_DISPATCH(mc21, DAEDALUS_KERNEL_H264_QPEL_MC21) -DEFINE_QPEL_DISPATCH(mc23, DAEDALUS_KERNEL_H264_QPEL_MC23) -DEFINE_QPEL_DISPATCH(mc31, DAEDALUS_KERNEL_H264_QPEL_MC31) -DEFINE_QPEL_DISPATCH(mc32, DAEDALUS_KERNEL_H264_QPEL_MC32) -DEFINE_QPEL_DISPATCH(mc33, DAEDALUS_KERNEL_H264_QPEL_MC33) +/* mc11..mc33 diagonals — QPU-capable, same macro shape as mc10/30/01/03. */ +#define DEFINE_QPEL_DIAG_PUBLIC(suffix, kernel) \ +int daedalus_dispatch_h264_qpel_ ## suffix(daedalus_ctx *ctx, \ + daedalus_substrate sub, uint8_t *dst, const uint8_t *src, size_t stride, \ + size_t n_blocks, const daedalus_h264_qpel_meta *meta) \ +{ \ + daedalus_substrate eff = sub; \ + if (eff == DAEDALUS_SUBSTRATE_AUTO) \ + eff = daedalus_recipe_substrate_for(kernel); \ + if (eff == DAEDALUS_SUBSTRATE_QPU && !daedalus_ctx_has_qpu(ctx)) \ + eff = DAEDALUS_SUBSTRATE_CPU; \ + if (eff == DAEDALUS_SUBSTRATE_CPU) \ + return dispatch_h264_qpel_ ## suffix ## _cpu(ctx, dst, src, stride, \ + n_blocks, meta); \ + return dispatch_h264_qpel_ ## suffix ## _qpu(ctx, dst, src, stride, \ + n_blocks, meta); \ +} + +DEFINE_QPEL_DIAG_PUBLIC(mc11, DAEDALUS_KERNEL_H264_QPEL_MC11) +DEFINE_QPEL_DIAG_PUBLIC(mc12, DAEDALUS_KERNEL_H264_QPEL_MC12) +DEFINE_QPEL_DIAG_PUBLIC(mc13, DAEDALUS_KERNEL_H264_QPEL_MC13) +DEFINE_QPEL_DIAG_PUBLIC(mc21, DAEDALUS_KERNEL_H264_QPEL_MC21) +DEFINE_QPEL_DIAG_PUBLIC(mc23, DAEDALUS_KERNEL_H264_QPEL_MC23) +DEFINE_QPEL_DIAG_PUBLIC(mc31, DAEDALUS_KERNEL_H264_QPEL_MC31) +DEFINE_QPEL_DIAG_PUBLIC(mc32, DAEDALUS_KERNEL_H264_QPEL_MC32) +DEFINE_QPEL_DIAG_PUBLIC(mc33, DAEDALUS_KERNEL_H264_QPEL_MC33) +#undef DEFINE_QPEL_DIAG_PUBLIC DEFINE_QPEL_DISPATCH(avg_mc20, DAEDALUS_KERNEL_H264_QPEL_AVG_MC20) DEFINE_QPEL_DISPATCH(avg_mc02, DAEDALUS_KERNEL_H264_QPEL_AVG_MC02) DEFINE_QPEL_DISPATCH(avg_mc22, DAEDALUS_KERNEL_H264_QPEL_AVG_MC22) diff --git a/src/v3d_h264_qpel_mc11.comp b/src/v3d_h264_qpel_mc11.comp new file mode 100644 index 0000000..217272e --- /dev/null +++ b/src/v3d_h264_qpel_mc11.comp @@ -0,0 +1,88 @@ +// daedalus-fourier — H.264 luma qpel mc11 (8x8, diagonal quarter-pel), +// V3D 7.1. Per H.264 §8.4.2.2.1 (table 8-4) — composes two half-pel +// anchors via L2 rounded-average: +// +// mc11[r,c] = avg(mc20(r, c), +// mc02(r, c)) +// +// Per-lane structure: each lane computes BOTH anchor outputs at its +// own (r, c) target offset, then L2 averages. No shared memory. +// Same WG geometry as the other qpel shaders. +// +// License: BSD-2-Clause. + +#version 450 +#extension GL_EXT_shader_8bit_storage : require +#extension GL_EXT_shader_explicit_arithmetic_types : require + +layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in; +layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src; +layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst; +layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta; +layout(push_constant) uniform PC { uint n_blocks, stride_u8, _p0, _p1; } pc; + +int hpel_h(uint src_off, uint stride, uint r, uint c) { + uint row_base = src_off + r * stride + c; + int s_m2 = int(u_src.src[row_base - 2u]); + int s_m1 = int(u_src.src[row_base - 1u]); + int s_0 = int(u_src.src[row_base ]); + int s_p1 = int(u_src.src[row_base + 1u]); + int s_p2 = int(u_src.src[row_base + 2u]); + int s_p3 = int(u_src.src[row_base + 3u]); + int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16; + return clamp(v >> 5, 0, 255); +} + +int hpel_v(uint src_off, uint stride, uint r, uint c) { + uint col_base = src_off + c; + int s_m2 = int(u_src.src[col_base + (r - 2u) * stride]); + int s_m1 = int(u_src.src[col_base + (r - 1u) * stride]); + int s_0 = int(u_src.src[col_base + r * stride]); + int s_p1 = int(u_src.src[col_base + (r + 1u) * stride]); + int s_p2 = int(u_src.src[col_base + (r + 2u) * stride]); + int s_p3 = int(u_src.src[col_base + (r + 3u) * stride]); + int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16; + return clamp(v >> 5, 0, 255); +} + +int hpel_hv_row(uint src_off, uint stride, uint rr, uint c) { + // Single row's int16 horizontal lowpass (NOT clipped — used as + // intermediate for the vertical pass of hpel_hv). + uint row_base = src_off + rr * stride + c; + int s_m2 = int(u_src.src[row_base - 2u]); + int s_m1 = int(u_src.src[row_base - 1u]); + int s_0 = int(u_src.src[row_base ]); + int s_p1 = int(u_src.src[row_base + 1u]); + int s_p2 = int(u_src.src[row_base + 2u]); + int s_p3 = int(u_src.src[row_base + 3u]); + return s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3; +} + +int hpel_hv(uint src_off, uint stride, uint r, uint c) { + int t0 = hpel_hv_row(src_off, stride, r - 2u, c); + int t1 = hpel_hv_row(src_off, stride, r - 1u, c); + int t2 = hpel_hv_row(src_off, stride, r, c); + int t3 = hpel_hv_row(src_off, stride, r + 1u, c); + int t4 = hpel_hv_row(src_off, stride, r + 2u, c); + int t5 = hpel_hv_row(src_off, stride, r + 3u, c); + int v = t0 - 5*t1 + 20*t2 + 20*t3 - 5*t4 + t5 + 512; + return clamp(v >> 10, 0, 255); +} + +void main() +{ + uint block_idx = gl_WorkGroupID.x; + if (block_idx >= pc.n_blocks) return; + + uint lane = gl_LocalInvocationID.x; + uint r = lane >> 3, c = lane & 7u; + + uint dst_off = u_meta.meta[block_idx].x; + uint src_off = u_meta.meta[block_idx].y; + uint stride = pc.stride_u8; + + int a = hpel_h(src_off, stride, r, c); + int b = hpel_v(src_off, stride, r, c); + int avg = (a + b + 1) >> 1; + u_dst.dst[dst_off + r * stride + c] = uint8_t(avg); +} diff --git a/src/v3d_h264_qpel_mc12.comp b/src/v3d_h264_qpel_mc12.comp new file mode 100644 index 0000000..bb03f21 --- /dev/null +++ b/src/v3d_h264_qpel_mc12.comp @@ -0,0 +1,88 @@ +// daedalus-fourier — H.264 luma qpel mc12 (8x8, diagonal quarter-pel), +// V3D 7.1. Per H.264 §8.4.2.2.1 (table 8-4) — composes two half-pel +// anchors via L2 rounded-average: +// +// mc12[r,c] = avg(mc22(r, c), +// mc02(r, c)) +// +// Per-lane structure: each lane computes BOTH anchor outputs at its +// own (r, c) target offset, then L2 averages. No shared memory. +// Same WG geometry as the other qpel shaders. +// +// License: BSD-2-Clause. + +#version 450 +#extension GL_EXT_shader_8bit_storage : require +#extension GL_EXT_shader_explicit_arithmetic_types : require + +layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in; +layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src; +layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst; +layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta; +layout(push_constant) uniform PC { uint n_blocks, stride_u8, _p0, _p1; } pc; + +int hpel_h(uint src_off, uint stride, uint r, uint c) { + uint row_base = src_off + r * stride + c; + int s_m2 = int(u_src.src[row_base - 2u]); + int s_m1 = int(u_src.src[row_base - 1u]); + int s_0 = int(u_src.src[row_base ]); + int s_p1 = int(u_src.src[row_base + 1u]); + int s_p2 = int(u_src.src[row_base + 2u]); + int s_p3 = int(u_src.src[row_base + 3u]); + int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16; + return clamp(v >> 5, 0, 255); +} + +int hpel_v(uint src_off, uint stride, uint r, uint c) { + uint col_base = src_off + c; + int s_m2 = int(u_src.src[col_base + (r - 2u) * stride]); + int s_m1 = int(u_src.src[col_base + (r - 1u) * stride]); + int s_0 = int(u_src.src[col_base + r * stride]); + int s_p1 = int(u_src.src[col_base + (r + 1u) * stride]); + int s_p2 = int(u_src.src[col_base + (r + 2u) * stride]); + int s_p3 = int(u_src.src[col_base + (r + 3u) * stride]); + int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16; + return clamp(v >> 5, 0, 255); +} + +int hpel_hv_row(uint src_off, uint stride, uint rr, uint c) { + // Single row's int16 horizontal lowpass (NOT clipped — used as + // intermediate for the vertical pass of hpel_hv). + uint row_base = src_off + rr * stride + c; + int s_m2 = int(u_src.src[row_base - 2u]); + int s_m1 = int(u_src.src[row_base - 1u]); + int s_0 = int(u_src.src[row_base ]); + int s_p1 = int(u_src.src[row_base + 1u]); + int s_p2 = int(u_src.src[row_base + 2u]); + int s_p3 = int(u_src.src[row_base + 3u]); + return s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3; +} + +int hpel_hv(uint src_off, uint stride, uint r, uint c) { + int t0 = hpel_hv_row(src_off, stride, r - 2u, c); + int t1 = hpel_hv_row(src_off, stride, r - 1u, c); + int t2 = hpel_hv_row(src_off, stride, r, c); + int t3 = hpel_hv_row(src_off, stride, r + 1u, c); + int t4 = hpel_hv_row(src_off, stride, r + 2u, c); + int t5 = hpel_hv_row(src_off, stride, r + 3u, c); + int v = t0 - 5*t1 + 20*t2 + 20*t3 - 5*t4 + t5 + 512; + return clamp(v >> 10, 0, 255); +} + +void main() +{ + uint block_idx = gl_WorkGroupID.x; + if (block_idx >= pc.n_blocks) return; + + uint lane = gl_LocalInvocationID.x; + uint r = lane >> 3, c = lane & 7u; + + uint dst_off = u_meta.meta[block_idx].x; + uint src_off = u_meta.meta[block_idx].y; + uint stride = pc.stride_u8; + + int a = hpel_hv(src_off, stride, r, c); + int b = hpel_v(src_off, stride, r, c); + int avg = (a + b + 1) >> 1; + u_dst.dst[dst_off + r * stride + c] = uint8_t(avg); +} diff --git a/src/v3d_h264_qpel_mc13.comp b/src/v3d_h264_qpel_mc13.comp new file mode 100644 index 0000000..2780de7 --- /dev/null +++ b/src/v3d_h264_qpel_mc13.comp @@ -0,0 +1,88 @@ +// daedalus-fourier — H.264 luma qpel mc13 (8x8, diagonal quarter-pel), +// V3D 7.1. Per H.264 §8.4.2.2.1 (table 8-4) — composes two half-pel +// anchors via L2 rounded-average: +// +// mc13[r,c] = avg(mc20(r+1, c), +// mc02(r, c)) +// +// Per-lane structure: each lane computes BOTH anchor outputs at its +// own (r, c) target offset, then L2 averages. No shared memory. +// Same WG geometry as the other qpel shaders. +// +// License: BSD-2-Clause. + +#version 450 +#extension GL_EXT_shader_8bit_storage : require +#extension GL_EXT_shader_explicit_arithmetic_types : require + +layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in; +layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src; +layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst; +layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta; +layout(push_constant) uniform PC { uint n_blocks, stride_u8, _p0, _p1; } pc; + +int hpel_h(uint src_off, uint stride, uint r, uint c) { + uint row_base = src_off + r * stride + c; + int s_m2 = int(u_src.src[row_base - 2u]); + int s_m1 = int(u_src.src[row_base - 1u]); + int s_0 = int(u_src.src[row_base ]); + int s_p1 = int(u_src.src[row_base + 1u]); + int s_p2 = int(u_src.src[row_base + 2u]); + int s_p3 = int(u_src.src[row_base + 3u]); + int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16; + return clamp(v >> 5, 0, 255); +} + +int hpel_v(uint src_off, uint stride, uint r, uint c) { + uint col_base = src_off + c; + int s_m2 = int(u_src.src[col_base + (r - 2u) * stride]); + int s_m1 = int(u_src.src[col_base + (r - 1u) * stride]); + int s_0 = int(u_src.src[col_base + r * stride]); + int s_p1 = int(u_src.src[col_base + (r + 1u) * stride]); + int s_p2 = int(u_src.src[col_base + (r + 2u) * stride]); + int s_p3 = int(u_src.src[col_base + (r + 3u) * stride]); + int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16; + return clamp(v >> 5, 0, 255); +} + +int hpel_hv_row(uint src_off, uint stride, uint rr, uint c) { + // Single row's int16 horizontal lowpass (NOT clipped — used as + // intermediate for the vertical pass of hpel_hv). + uint row_base = src_off + rr * stride + c; + int s_m2 = int(u_src.src[row_base - 2u]); + int s_m1 = int(u_src.src[row_base - 1u]); + int s_0 = int(u_src.src[row_base ]); + int s_p1 = int(u_src.src[row_base + 1u]); + int s_p2 = int(u_src.src[row_base + 2u]); + int s_p3 = int(u_src.src[row_base + 3u]); + return s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3; +} + +int hpel_hv(uint src_off, uint stride, uint r, uint c) { + int t0 = hpel_hv_row(src_off, stride, r - 2u, c); + int t1 = hpel_hv_row(src_off, stride, r - 1u, c); + int t2 = hpel_hv_row(src_off, stride, r, c); + int t3 = hpel_hv_row(src_off, stride, r + 1u, c); + int t4 = hpel_hv_row(src_off, stride, r + 2u, c); + int t5 = hpel_hv_row(src_off, stride, r + 3u, c); + int v = t0 - 5*t1 + 20*t2 + 20*t3 - 5*t4 + t5 + 512; + return clamp(v >> 10, 0, 255); +} + +void main() +{ + uint block_idx = gl_WorkGroupID.x; + if (block_idx >= pc.n_blocks) return; + + uint lane = gl_LocalInvocationID.x; + uint r = lane >> 3, c = lane & 7u; + + uint dst_off = u_meta.meta[block_idx].x; + uint src_off = u_meta.meta[block_idx].y; + uint stride = pc.stride_u8; + + int a = hpel_h(src_off, stride, r+1u, c); + int b = hpel_v(src_off, stride, r, c); + int avg = (a + b + 1) >> 1; + u_dst.dst[dst_off + r * stride + c] = uint8_t(avg); +} diff --git a/src/v3d_h264_qpel_mc21.comp b/src/v3d_h264_qpel_mc21.comp new file mode 100644 index 0000000..2bfebb5 --- /dev/null +++ b/src/v3d_h264_qpel_mc21.comp @@ -0,0 +1,88 @@ +// daedalus-fourier — H.264 luma qpel mc21 (8x8, diagonal quarter-pel), +// V3D 7.1. Per H.264 §8.4.2.2.1 (table 8-4) — composes two half-pel +// anchors via L2 rounded-average: +// +// mc21[r,c] = avg(mc22(r, c), +// mc20(r, c)) +// +// Per-lane structure: each lane computes BOTH anchor outputs at its +// own (r, c) target offset, then L2 averages. No shared memory. +// Same WG geometry as the other qpel shaders. +// +// License: BSD-2-Clause. + +#version 450 +#extension GL_EXT_shader_8bit_storage : require +#extension GL_EXT_shader_explicit_arithmetic_types : require + +layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in; +layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src; +layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst; +layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta; +layout(push_constant) uniform PC { uint n_blocks, stride_u8, _p0, _p1; } pc; + +int hpel_h(uint src_off, uint stride, uint r, uint c) { + uint row_base = src_off + r * stride + c; + int s_m2 = int(u_src.src[row_base - 2u]); + int s_m1 = int(u_src.src[row_base - 1u]); + int s_0 = int(u_src.src[row_base ]); + int s_p1 = int(u_src.src[row_base + 1u]); + int s_p2 = int(u_src.src[row_base + 2u]); + int s_p3 = int(u_src.src[row_base + 3u]); + int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16; + return clamp(v >> 5, 0, 255); +} + +int hpel_v(uint src_off, uint stride, uint r, uint c) { + uint col_base = src_off + c; + int s_m2 = int(u_src.src[col_base + (r - 2u) * stride]); + int s_m1 = int(u_src.src[col_base + (r - 1u) * stride]); + int s_0 = int(u_src.src[col_base + r * stride]); + int s_p1 = int(u_src.src[col_base + (r + 1u) * stride]); + int s_p2 = int(u_src.src[col_base + (r + 2u) * stride]); + int s_p3 = int(u_src.src[col_base + (r + 3u) * stride]); + int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16; + return clamp(v >> 5, 0, 255); +} + +int hpel_hv_row(uint src_off, uint stride, uint rr, uint c) { + // Single row's int16 horizontal lowpass (NOT clipped — used as + // intermediate for the vertical pass of hpel_hv). + uint row_base = src_off + rr * stride + c; + int s_m2 = int(u_src.src[row_base - 2u]); + int s_m1 = int(u_src.src[row_base - 1u]); + int s_0 = int(u_src.src[row_base ]); + int s_p1 = int(u_src.src[row_base + 1u]); + int s_p2 = int(u_src.src[row_base + 2u]); + int s_p3 = int(u_src.src[row_base + 3u]); + return s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3; +} + +int hpel_hv(uint src_off, uint stride, uint r, uint c) { + int t0 = hpel_hv_row(src_off, stride, r - 2u, c); + int t1 = hpel_hv_row(src_off, stride, r - 1u, c); + int t2 = hpel_hv_row(src_off, stride, r, c); + int t3 = hpel_hv_row(src_off, stride, r + 1u, c); + int t4 = hpel_hv_row(src_off, stride, r + 2u, c); + int t5 = hpel_hv_row(src_off, stride, r + 3u, c); + int v = t0 - 5*t1 + 20*t2 + 20*t3 - 5*t4 + t5 + 512; + return clamp(v >> 10, 0, 255); +} + +void main() +{ + uint block_idx = gl_WorkGroupID.x; + if (block_idx >= pc.n_blocks) return; + + uint lane = gl_LocalInvocationID.x; + uint r = lane >> 3, c = lane & 7u; + + uint dst_off = u_meta.meta[block_idx].x; + uint src_off = u_meta.meta[block_idx].y; + uint stride = pc.stride_u8; + + int a = hpel_hv(src_off, stride, r, c); + int b = hpel_h(src_off, stride, r, c); + int avg = (a + b + 1) >> 1; + u_dst.dst[dst_off + r * stride + c] = uint8_t(avg); +} diff --git a/src/v3d_h264_qpel_mc23.comp b/src/v3d_h264_qpel_mc23.comp new file mode 100644 index 0000000..485cb9c --- /dev/null +++ b/src/v3d_h264_qpel_mc23.comp @@ -0,0 +1,88 @@ +// daedalus-fourier — H.264 luma qpel mc23 (8x8, diagonal quarter-pel), +// V3D 7.1. Per H.264 §8.4.2.2.1 (table 8-4) — composes two half-pel +// anchors via L2 rounded-average: +// +// mc23[r,c] = avg(mc22(r, c), +// mc20(r+1, c)) +// +// Per-lane structure: each lane computes BOTH anchor outputs at its +// own (r, c) target offset, then L2 averages. No shared memory. +// Same WG geometry as the other qpel shaders. +// +// License: BSD-2-Clause. + +#version 450 +#extension GL_EXT_shader_8bit_storage : require +#extension GL_EXT_shader_explicit_arithmetic_types : require + +layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in; +layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src; +layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst; +layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta; +layout(push_constant) uniform PC { uint n_blocks, stride_u8, _p0, _p1; } pc; + +int hpel_h(uint src_off, uint stride, uint r, uint c) { + uint row_base = src_off + r * stride + c; + int s_m2 = int(u_src.src[row_base - 2u]); + int s_m1 = int(u_src.src[row_base - 1u]); + int s_0 = int(u_src.src[row_base ]); + int s_p1 = int(u_src.src[row_base + 1u]); + int s_p2 = int(u_src.src[row_base + 2u]); + int s_p3 = int(u_src.src[row_base + 3u]); + int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16; + return clamp(v >> 5, 0, 255); +} + +int hpel_v(uint src_off, uint stride, uint r, uint c) { + uint col_base = src_off + c; + int s_m2 = int(u_src.src[col_base + (r - 2u) * stride]); + int s_m1 = int(u_src.src[col_base + (r - 1u) * stride]); + int s_0 = int(u_src.src[col_base + r * stride]); + int s_p1 = int(u_src.src[col_base + (r + 1u) * stride]); + int s_p2 = int(u_src.src[col_base + (r + 2u) * stride]); + int s_p3 = int(u_src.src[col_base + (r + 3u) * stride]); + int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16; + return clamp(v >> 5, 0, 255); +} + +int hpel_hv_row(uint src_off, uint stride, uint rr, uint c) { + // Single row's int16 horizontal lowpass (NOT clipped — used as + // intermediate for the vertical pass of hpel_hv). + uint row_base = src_off + rr * stride + c; + int s_m2 = int(u_src.src[row_base - 2u]); + int s_m1 = int(u_src.src[row_base - 1u]); + int s_0 = int(u_src.src[row_base ]); + int s_p1 = int(u_src.src[row_base + 1u]); + int s_p2 = int(u_src.src[row_base + 2u]); + int s_p3 = int(u_src.src[row_base + 3u]); + return s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3; +} + +int hpel_hv(uint src_off, uint stride, uint r, uint c) { + int t0 = hpel_hv_row(src_off, stride, r - 2u, c); + int t1 = hpel_hv_row(src_off, stride, r - 1u, c); + int t2 = hpel_hv_row(src_off, stride, r, c); + int t3 = hpel_hv_row(src_off, stride, r + 1u, c); + int t4 = hpel_hv_row(src_off, stride, r + 2u, c); + int t5 = hpel_hv_row(src_off, stride, r + 3u, c); + int v = t0 - 5*t1 + 20*t2 + 20*t3 - 5*t4 + t5 + 512; + return clamp(v >> 10, 0, 255); +} + +void main() +{ + uint block_idx = gl_WorkGroupID.x; + if (block_idx >= pc.n_blocks) return; + + uint lane = gl_LocalInvocationID.x; + uint r = lane >> 3, c = lane & 7u; + + uint dst_off = u_meta.meta[block_idx].x; + uint src_off = u_meta.meta[block_idx].y; + uint stride = pc.stride_u8; + + int a = hpel_hv(src_off, stride, r, c); + int b = hpel_h(src_off, stride, r+1u, c); + int avg = (a + b + 1) >> 1; + u_dst.dst[dst_off + r * stride + c] = uint8_t(avg); +} diff --git a/src/v3d_h264_qpel_mc31.comp b/src/v3d_h264_qpel_mc31.comp new file mode 100644 index 0000000..2047984 --- /dev/null +++ b/src/v3d_h264_qpel_mc31.comp @@ -0,0 +1,88 @@ +// daedalus-fourier — H.264 luma qpel mc31 (8x8, diagonal quarter-pel), +// V3D 7.1. Per H.264 §8.4.2.2.1 (table 8-4) — composes two half-pel +// anchors via L2 rounded-average: +// +// mc31[r,c] = avg(mc20(r, c), +// mc02(r, c+1)) +// +// Per-lane structure: each lane computes BOTH anchor outputs at its +// own (r, c) target offset, then L2 averages. No shared memory. +// Same WG geometry as the other qpel shaders. +// +// License: BSD-2-Clause. + +#version 450 +#extension GL_EXT_shader_8bit_storage : require +#extension GL_EXT_shader_explicit_arithmetic_types : require + +layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in; +layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src; +layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst; +layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta; +layout(push_constant) uniform PC { uint n_blocks, stride_u8, _p0, _p1; } pc; + +int hpel_h(uint src_off, uint stride, uint r, uint c) { + uint row_base = src_off + r * stride + c; + int s_m2 = int(u_src.src[row_base - 2u]); + int s_m1 = int(u_src.src[row_base - 1u]); + int s_0 = int(u_src.src[row_base ]); + int s_p1 = int(u_src.src[row_base + 1u]); + int s_p2 = int(u_src.src[row_base + 2u]); + int s_p3 = int(u_src.src[row_base + 3u]); + int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16; + return clamp(v >> 5, 0, 255); +} + +int hpel_v(uint src_off, uint stride, uint r, uint c) { + uint col_base = src_off + c; + int s_m2 = int(u_src.src[col_base + (r - 2u) * stride]); + int s_m1 = int(u_src.src[col_base + (r - 1u) * stride]); + int s_0 = int(u_src.src[col_base + r * stride]); + int s_p1 = int(u_src.src[col_base + (r + 1u) * stride]); + int s_p2 = int(u_src.src[col_base + (r + 2u) * stride]); + int s_p3 = int(u_src.src[col_base + (r + 3u) * stride]); + int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16; + return clamp(v >> 5, 0, 255); +} + +int hpel_hv_row(uint src_off, uint stride, uint rr, uint c) { + // Single row's int16 horizontal lowpass (NOT clipped — used as + // intermediate for the vertical pass of hpel_hv). + uint row_base = src_off + rr * stride + c; + int s_m2 = int(u_src.src[row_base - 2u]); + int s_m1 = int(u_src.src[row_base - 1u]); + int s_0 = int(u_src.src[row_base ]); + int s_p1 = int(u_src.src[row_base + 1u]); + int s_p2 = int(u_src.src[row_base + 2u]); + int s_p3 = int(u_src.src[row_base + 3u]); + return s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3; +} + +int hpel_hv(uint src_off, uint stride, uint r, uint c) { + int t0 = hpel_hv_row(src_off, stride, r - 2u, c); + int t1 = hpel_hv_row(src_off, stride, r - 1u, c); + int t2 = hpel_hv_row(src_off, stride, r, c); + int t3 = hpel_hv_row(src_off, stride, r + 1u, c); + int t4 = hpel_hv_row(src_off, stride, r + 2u, c); + int t5 = hpel_hv_row(src_off, stride, r + 3u, c); + int v = t0 - 5*t1 + 20*t2 + 20*t3 - 5*t4 + t5 + 512; + return clamp(v >> 10, 0, 255); +} + +void main() +{ + uint block_idx = gl_WorkGroupID.x; + if (block_idx >= pc.n_blocks) return; + + uint lane = gl_LocalInvocationID.x; + uint r = lane >> 3, c = lane & 7u; + + uint dst_off = u_meta.meta[block_idx].x; + uint src_off = u_meta.meta[block_idx].y; + uint stride = pc.stride_u8; + + int a = hpel_h(src_off, stride, r, c); + int b = hpel_v(src_off, stride, r, c+1u); + int avg = (a + b + 1) >> 1; + u_dst.dst[dst_off + r * stride + c] = uint8_t(avg); +} diff --git a/src/v3d_h264_qpel_mc32.comp b/src/v3d_h264_qpel_mc32.comp new file mode 100644 index 0000000..de54eb8 --- /dev/null +++ b/src/v3d_h264_qpel_mc32.comp @@ -0,0 +1,88 @@ +// daedalus-fourier — H.264 luma qpel mc32 (8x8, diagonal quarter-pel), +// V3D 7.1. Per H.264 §8.4.2.2.1 (table 8-4) — composes two half-pel +// anchors via L2 rounded-average: +// +// mc32[r,c] = avg(mc22(r, c), +// mc02(r, c+1)) +// +// Per-lane structure: each lane computes BOTH anchor outputs at its +// own (r, c) target offset, then L2 averages. No shared memory. +// Same WG geometry as the other qpel shaders. +// +// License: BSD-2-Clause. + +#version 450 +#extension GL_EXT_shader_8bit_storage : require +#extension GL_EXT_shader_explicit_arithmetic_types : require + +layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in; +layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src; +layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst; +layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta; +layout(push_constant) uniform PC { uint n_blocks, stride_u8, _p0, _p1; } pc; + +int hpel_h(uint src_off, uint stride, uint r, uint c) { + uint row_base = src_off + r * stride + c; + int s_m2 = int(u_src.src[row_base - 2u]); + int s_m1 = int(u_src.src[row_base - 1u]); + int s_0 = int(u_src.src[row_base ]); + int s_p1 = int(u_src.src[row_base + 1u]); + int s_p2 = int(u_src.src[row_base + 2u]); + int s_p3 = int(u_src.src[row_base + 3u]); + int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16; + return clamp(v >> 5, 0, 255); +} + +int hpel_v(uint src_off, uint stride, uint r, uint c) { + uint col_base = src_off + c; + int s_m2 = int(u_src.src[col_base + (r - 2u) * stride]); + int s_m1 = int(u_src.src[col_base + (r - 1u) * stride]); + int s_0 = int(u_src.src[col_base + r * stride]); + int s_p1 = int(u_src.src[col_base + (r + 1u) * stride]); + int s_p2 = int(u_src.src[col_base + (r + 2u) * stride]); + int s_p3 = int(u_src.src[col_base + (r + 3u) * stride]); + int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16; + return clamp(v >> 5, 0, 255); +} + +int hpel_hv_row(uint src_off, uint stride, uint rr, uint c) { + // Single row's int16 horizontal lowpass (NOT clipped — used as + // intermediate for the vertical pass of hpel_hv). + uint row_base = src_off + rr * stride + c; + int s_m2 = int(u_src.src[row_base - 2u]); + int s_m1 = int(u_src.src[row_base - 1u]); + int s_0 = int(u_src.src[row_base ]); + int s_p1 = int(u_src.src[row_base + 1u]); + int s_p2 = int(u_src.src[row_base + 2u]); + int s_p3 = int(u_src.src[row_base + 3u]); + return s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3; +} + +int hpel_hv(uint src_off, uint stride, uint r, uint c) { + int t0 = hpel_hv_row(src_off, stride, r - 2u, c); + int t1 = hpel_hv_row(src_off, stride, r - 1u, c); + int t2 = hpel_hv_row(src_off, stride, r, c); + int t3 = hpel_hv_row(src_off, stride, r + 1u, c); + int t4 = hpel_hv_row(src_off, stride, r + 2u, c); + int t5 = hpel_hv_row(src_off, stride, r + 3u, c); + int v = t0 - 5*t1 + 20*t2 + 20*t3 - 5*t4 + t5 + 512; + return clamp(v >> 10, 0, 255); +} + +void main() +{ + uint block_idx = gl_WorkGroupID.x; + if (block_idx >= pc.n_blocks) return; + + uint lane = gl_LocalInvocationID.x; + uint r = lane >> 3, c = lane & 7u; + + uint dst_off = u_meta.meta[block_idx].x; + uint src_off = u_meta.meta[block_idx].y; + uint stride = pc.stride_u8; + + int a = hpel_hv(src_off, stride, r, c); + int b = hpel_v(src_off, stride, r, c+1u); + int avg = (a + b + 1) >> 1; + u_dst.dst[dst_off + r * stride + c] = uint8_t(avg); +} diff --git a/src/v3d_h264_qpel_mc33.comp b/src/v3d_h264_qpel_mc33.comp new file mode 100644 index 0000000..707cb0f --- /dev/null +++ b/src/v3d_h264_qpel_mc33.comp @@ -0,0 +1,88 @@ +// daedalus-fourier — H.264 luma qpel mc33 (8x8, diagonal quarter-pel), +// V3D 7.1. Per H.264 §8.4.2.2.1 (table 8-4) — composes two half-pel +// anchors via L2 rounded-average: +// +// mc33[r,c] = avg(mc20(r+1, c), +// mc02(r, c+1)) +// +// Per-lane structure: each lane computes BOTH anchor outputs at its +// own (r, c) target offset, then L2 averages. No shared memory. +// Same WG geometry as the other qpel shaders. +// +// License: BSD-2-Clause. + +#version 450 +#extension GL_EXT_shader_8bit_storage : require +#extension GL_EXT_shader_explicit_arithmetic_types : require + +layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in; +layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src; +layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst; +layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta; +layout(push_constant) uniform PC { uint n_blocks, stride_u8, _p0, _p1; } pc; + +int hpel_h(uint src_off, uint stride, uint r, uint c) { + uint row_base = src_off + r * stride + c; + int s_m2 = int(u_src.src[row_base - 2u]); + int s_m1 = int(u_src.src[row_base - 1u]); + int s_0 = int(u_src.src[row_base ]); + int s_p1 = int(u_src.src[row_base + 1u]); + int s_p2 = int(u_src.src[row_base + 2u]); + int s_p3 = int(u_src.src[row_base + 3u]); + int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16; + return clamp(v >> 5, 0, 255); +} + +int hpel_v(uint src_off, uint stride, uint r, uint c) { + uint col_base = src_off + c; + int s_m2 = int(u_src.src[col_base + (r - 2u) * stride]); + int s_m1 = int(u_src.src[col_base + (r - 1u) * stride]); + int s_0 = int(u_src.src[col_base + r * stride]); + int s_p1 = int(u_src.src[col_base + (r + 1u) * stride]); + int s_p2 = int(u_src.src[col_base + (r + 2u) * stride]); + int s_p3 = int(u_src.src[col_base + (r + 3u) * stride]); + int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16; + return clamp(v >> 5, 0, 255); +} + +int hpel_hv_row(uint src_off, uint stride, uint rr, uint c) { + // Single row's int16 horizontal lowpass (NOT clipped — used as + // intermediate for the vertical pass of hpel_hv). + uint row_base = src_off + rr * stride + c; + int s_m2 = int(u_src.src[row_base - 2u]); + int s_m1 = int(u_src.src[row_base - 1u]); + int s_0 = int(u_src.src[row_base ]); + int s_p1 = int(u_src.src[row_base + 1u]); + int s_p2 = int(u_src.src[row_base + 2u]); + int s_p3 = int(u_src.src[row_base + 3u]); + return s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3; +} + +int hpel_hv(uint src_off, uint stride, uint r, uint c) { + int t0 = hpel_hv_row(src_off, stride, r - 2u, c); + int t1 = hpel_hv_row(src_off, stride, r - 1u, c); + int t2 = hpel_hv_row(src_off, stride, r, c); + int t3 = hpel_hv_row(src_off, stride, r + 1u, c); + int t4 = hpel_hv_row(src_off, stride, r + 2u, c); + int t5 = hpel_hv_row(src_off, stride, r + 3u, c); + int v = t0 - 5*t1 + 20*t2 + 20*t3 - 5*t4 + t5 + 512; + return clamp(v >> 10, 0, 255); +} + +void main() +{ + uint block_idx = gl_WorkGroupID.x; + if (block_idx >= pc.n_blocks) return; + + uint lane = gl_LocalInvocationID.x; + uint r = lane >> 3, c = lane & 7u; + + uint dst_off = u_meta.meta[block_idx].x; + uint src_off = u_meta.meta[block_idx].y; + uint stride = pc.stride_u8; + + int a = hpel_h(src_off, stride, r+1u, c); + int b = hpel_v(src_off, stride, r, c+1u); + int avg = (a + b + 1) >> 1; + u_dst.dst[dst_off + r * stride + c] = uint8_t(avg); +} -- 2.47.3