claude-noether
2079fe39c6
Generates 15 avg_ shader variants by templating from the existing put_ shaders. Each avg_ shader is identical to its put_ sibling except the final write does an L2 average with the existing dst: put_: dst[r,c] = result avg_: dst[r,c] = (dst[r,c] + result + 1) >> 1 Per H.264 §8.4.2.3.1 (B-slice biprediction): caller pre-loads dst with the list0 prediction; the avg_ call folds in list1. Generated via python (avg-shader-gen.py): reads each v3d_h264_qpel_mcXY.comp, transforms the docstring header + final write hunk, writes v3d_h264_qpel_avg_mcXY.comp. ~88 lines each; 15 new shader files. Dispatch reuses the existing dispatch_h264_qpel_diag_qpu helper for all 15 — same src envelope (10*stride+11 covers any (r±1, c±1) shift), the L2 step only touches dst. Slightly over-allocates for the simpler positions (avg_mc20/02/10/30/01/03) but negligible cost. Eliminates 15 wrappers + 15 src_max bound calculations that would otherwise duplicate. CMake foreach loops compile + install 15 new SPV files. ctx grows 15 pipeline pairs. Recipe table flips DAEDALUS_KERNEL_H264_QPEL_AVG_* from CPU to QPU. Public dispatchers re-defined via the existing DEFINE_QPEL_DIAG_PUBLIC macro (replaces the CPU-only DEFINE_QPEL_DISPATCH instantiations). Verified on hertz: $ ./build/test_api_h264 | grep "qpel avg" | wc -l 15 $ ./build/test_api_h264 | grep "qpel avg" | grep -c "100.0000%" 15 All 15 PASS 2048/2048 bytes bit-exact via QPU. QPU coverage for the H.264 8-bit 4:2:0 hot-path pixel kernels: Layer Coverage ───────────────────────────────────────────────────────────── IDCT 4x4 luma ✓ cycle 6 (one QPU shader, also handles chroma) IDCT 8x8 luma ✓ cycle 7 Chroma DC Hadamard CPU only (4 adds + 4 subs; not worth) Deblock luma_v ✓ cycle 8 Deblock luma_h ✓ PR #28 Deblock chroma_v/h ✓ PR #29 Deblock *_intra CPU only (less common, structurally different) qpel put_ 15 pos ✓ cycle 9 (mc20) + PRs #30-#33 qpel avg_ 15 pos ✓ THIS PR The H.264 non-intra-deblock hot path is now FULLY on QPU for any consumer that initialises daedalus with a QPU-capable context.
97 lines
3.7 KiB
Plaintext
97 lines
3.7 KiB
Plaintext
// daedalus-fourier — H.264 luma qpel avg_mc21 (biprediction) (8x8, diagonal quarter-pel),
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// V3D 7.1. Per H.264 §8.4.2.2.1 (table 8-4) — composes two half-pel
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// anchors via L2 rounded-average:
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//
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// mc21[r,c] = avg(mc22(r, c),
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// mc20(r, c))
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//
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// Per-lane structure: each lane computes BOTH anchor outputs at its
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// own (r, c) target offset, then L2 averages. No shared memory.
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// Same WG geometry as the other qpel shaders.
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//
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//
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// avg_ variant for B-slice biprediction per H.264 §8.4.2.3.1:
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// dst[r,c] = avg(dst[r,c], mc21_value)
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// Caller pre-loads dst with the list0 prediction; this shader
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// folds in the list1 contribution.
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//
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// License: BSD-2-Clause.
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#version 450
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#extension GL_EXT_shader_8bit_storage : require
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#extension GL_EXT_shader_explicit_arithmetic_types : require
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layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in;
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layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src;
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layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst;
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layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta;
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layout(push_constant) uniform PC { uint n_blocks, stride_u8, _p0, _p1; } pc;
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int hpel_h(uint src_off, uint stride, uint r, uint c) {
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uint row_base = src_off + r * stride + c;
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int s_m2 = int(u_src.src[row_base - 2u]);
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int s_m1 = int(u_src.src[row_base - 1u]);
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int s_0 = int(u_src.src[row_base ]);
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int s_p1 = int(u_src.src[row_base + 1u]);
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int s_p2 = int(u_src.src[row_base + 2u]);
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int s_p3 = int(u_src.src[row_base + 3u]);
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int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16;
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return clamp(v >> 5, 0, 255);
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}
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int hpel_v(uint src_off, uint stride, uint r, uint c) {
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uint col_base = src_off + c;
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int s_m2 = int(u_src.src[col_base + (r - 2u) * stride]);
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int s_m1 = int(u_src.src[col_base + (r - 1u) * stride]);
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int s_0 = int(u_src.src[col_base + r * stride]);
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int s_p1 = int(u_src.src[col_base + (r + 1u) * stride]);
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int s_p2 = int(u_src.src[col_base + (r + 2u) * stride]);
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int s_p3 = int(u_src.src[col_base + (r + 3u) * stride]);
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int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16;
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return clamp(v >> 5, 0, 255);
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}
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int hpel_hv_row(uint src_off, uint stride, uint rr, uint c) {
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// Single row's int16 horizontal lowpass (NOT clipped — used as
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// intermediate for the vertical pass of hpel_hv).
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uint row_base = src_off + rr * stride + c;
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int s_m2 = int(u_src.src[row_base - 2u]);
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int s_m1 = int(u_src.src[row_base - 1u]);
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int s_0 = int(u_src.src[row_base ]);
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int s_p1 = int(u_src.src[row_base + 1u]);
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int s_p2 = int(u_src.src[row_base + 2u]);
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int s_p3 = int(u_src.src[row_base + 3u]);
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return s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3;
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}
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int hpel_hv(uint src_off, uint stride, uint r, uint c) {
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int t0 = hpel_hv_row(src_off, stride, r - 2u, c);
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int t1 = hpel_hv_row(src_off, stride, r - 1u, c);
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int t2 = hpel_hv_row(src_off, stride, r, c);
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int t3 = hpel_hv_row(src_off, stride, r + 1u, c);
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int t4 = hpel_hv_row(src_off, stride, r + 2u, c);
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int t5 = hpel_hv_row(src_off, stride, r + 3u, c);
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int v = t0 - 5*t1 + 20*t2 + 20*t3 - 5*t4 + t5 + 512;
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return clamp(v >> 10, 0, 255);
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}
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void main()
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{
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uint block_idx = gl_WorkGroupID.x;
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if (block_idx >= pc.n_blocks) return;
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uint lane = gl_LocalInvocationID.x;
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uint r = lane >> 3, c = lane & 7u;
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uint dst_off = u_meta.meta[block_idx].x;
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uint src_off = u_meta.meta[block_idx].y;
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uint stride = pc.stride_u8;
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int a = hpel_hv(src_off, stride, r, c);
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int b = hpel_h(src_off, stride, r, c);
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int avg = (a + b + 1) >> 1;
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uint final_off = dst_off + r * stride + c;
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int prev = int(u_dst.dst[final_off]);
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u_dst.dst[final_off] = uint8_t((prev + avg + 1) >> 1);
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}
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