claude-noether
bc5edf656d
Sibling of cycle 9's v3d_h264_qpel_mc20.comp. Same 6-tap H.264 luma
half-pel filter, transposed to vertical orientation: filter reads
rows [-2..+3] of source per output pixel instead of cols.
Shader is ~58 lines (vs mc20's 86) — same WG geometry (64 lanes /
1 block per WG / 1 lane per output pixel). The address arithmetic
flips: row_base = src_off + r*stride + c (mc20) → col_base =
src_off + c, then col_base + (r±N)*stride (mc02).
dispatch_h264_qpel_mc02_qpu mirrors the mc20 QPU dispatch; src_max
calculation differs since the V kernel reads rows -2..+10 of source
(13 rows × stride wide) vs mc20's cols -2..+10 (8 rows × stride+11).
For 8x8 blocks: src_max = src_off + 10*stride + 8.
Recipe table flips DAEDALUS_KERNEL_H264_QPEL_MC02 from CPU to QPU.
Verified on hertz:
$ ./build/test_api_h264 | grep qpel
H.264 qpel mc20: 1024/1024 bytes bit-exact (100.0000%)
H.264 qpel mc02: 2048/2048 bytes bit-exact (100.0000%)
QPU coverage for the 30 qpel positions:
put_ mc20 ✓ (cycle 9) mc02 ✓ (this PR)
all 13 other put_ CPU NEON
avg_ all 15 positions CPU NEON
Next-priority candidates by per-frame impact (per PR #24 bench):
mc22 (2D half-pel) — 71.5 ns/block NEON × 32 640 blocks worst
case = 2.33 ms/frame at 1080p. Most-used
qpel position in real H.264 streams.
mc11/mc13/mc31/mc33 — corner ¼-pel positions, structurally similar
to mc20 + mc02 with L2 averaging.
The cascaded H+V structure of mc22 means it can either share the
existing mc20 + mc02 shaders' L2 (compute mc20 into tmp, then mc02
on tmp) or get a dedicated 2-stage pipeline. Follow-up.
70 lines
2.2 KiB
Plaintext
70 lines
2.2 KiB
Plaintext
// daedalus-fourier — H.264 luma qpel mc02 (8x8, vertical half-pel), V3D 7.1.
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//
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// Sibling of cycle 9's v3d_h264_qpel_mc20.comp. Same 6-tap filter,
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// transposed to vertical direction:
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//
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// dst[r,c] = clip255(
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// ( s[r-2,c]
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// - 5 * s[r-1,c]
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// + 20 * s[r, c]
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// + 20 * s[r+1,c]
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// - 5 * s[r+2,c]
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// + s[r+3,c]
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// + 16
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// ) >> 5)
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//
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// src+src_off points at row 0 col 0 of the OUTPUT block; the filter
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// reads rows -2..+3 (2 rows of top context, 3 rows of bottom).
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//
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// Same WG layout as mc20: 64 lanes / 1 block-per-WG / 1 lane-per-pixel.
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//
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// License: BSD-2-Clause.
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#version 450
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#extension GL_EXT_shader_8bit_storage : require
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#extension GL_EXT_shader_explicit_arithmetic_types : require
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layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in;
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layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src;
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layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst;
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layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta;
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layout(push_constant) uniform PC {
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uint n_blocks;
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uint stride_u8;
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uint _pad0, _pad1;
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} pc;
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void main()
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{
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uint block_idx = gl_WorkGroupID.x;
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if (block_idx >= pc.n_blocks) return;
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uint lane = gl_LocalInvocationID.x;
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uint r = lane >> 3;
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uint c = lane & 7u;
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uint dst_off = u_meta.meta[block_idx].x;
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uint src_off = u_meta.meta[block_idx].y;
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uint stride = pc.stride_u8;
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// Read the 6 rows of vertical context at col (c) of THIS output row.
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// src_off+r*stride+c is at the OUTPUT pixel position; the kernel
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// samples r-2..r+3 along the column. Unsigned-safe because the
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// public API contract guarantees src_off >= 2*stride.
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uint col_base = src_off + c;
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int s_m2 = int(u_src.src[col_base + (r - 2u) * stride]);
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int s_m1 = int(u_src.src[col_base + (r - 1u) * stride]);
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int s_0 = int(u_src.src[col_base + r * stride]);
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int s_p1 = int(u_src.src[col_base + (r + 1u) * stride]);
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int s_p2 = int(u_src.src[col_base + (r + 2u) * stride]);
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int s_p3 = int(u_src.src[col_base + (r + 3u) * stride]);
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int v = s_m2 - 5 * s_m1 + 20 * s_0 + 20 * s_p1 - 5 * s_p2 + s_p3 + 16;
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int p = clamp(v >> 5, 0, 255);
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u_dst.dst[dst_off + r * stride + c] = uint8_t(p);
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}
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