e01f7bc7c6
Closes the 4 single-axis quarter-pel positions in one PR. Each is
a half-pel lowpass clipped to u8 followed by L2 rounded-average
with an integer-aligned source pixel per H.264 §8.4.2.2.1:
mc10 ¼-H ("a" pos): clip255(mc20(s)) avg src[r,c]
mc30 ¾-H ("c" pos): clip255(mc20(s)) avg src[r,c+1]
mc01 ¼-V ("d" pos): clip255(mc02(s)) avg src[r,c]
mc03 ¾-V ("n" pos): clip255(mc02(s)) avg src[r+1,c]
The mc10/mc30 pair and mc01/mc03 pair only differ in WHICH integer
source pixel they average with — the half-pel computation is the
same. Putting them in one PR is justified by that uniformity.
Scope:
- 4 new kernel enums: MC10=19, MC30=20, MC01=21, MC03=22 → CPU.
- 4 NEON externs for the vendored ff_put_h264_qpel8_mc{10,30,01,03}_neon.
- 4 CPU dispatch wrappers via DEFINE_QPEL_CPU_DISPATCH macro
(collapses ~50 LOC of repetition).
- 4 public dispatch fns via DEFINE_QPEL_DISPATCH macro.
- 4 recipe wrappers via DEFINE_QPEL_RECIPE macro.
- tests/h264_qpel8_quarter_axis_ref.c covers all four via shared
hpel_h() / hpel_v() inlines + per-mode L2 average.
- Test refactor: generic run_quarter_axis_qpel() harness exercises
all 4 positions through a single helper (~50 LOC for 4 tests vs
~200 if each was hand-rolled).
Verified on hertz:
$ ./build/test_api_h264 | tail -8
H.264 deblock chroma h intra: 256/256 bytes bit-exact (100.0000%)
H.264 qpel mc20: 1024/1024 bytes bit-exact (100.0000%)
H.264 qpel mc02: 2048/2048 bytes bit-exact (100.0000%)
H.264 qpel mc22: 2048/2048 bytes bit-exact (100.0000%)
H.264 qpel mc10: 2048/2048 bytes bit-exact (100.0000%)
H.264 qpel mc30: 2048/2048 bytes bit-exact (100.0000%)
H.264 qpel mc01: 2048/2048 bytes bit-exact (100.0000%)
H.264 qpel mc03: 2048/2048 bytes bit-exact (100.0000%)
All 4 new positions bit-exact PASS first try.
Coverage matrix update:
put_ mc00 mc10 mc20 mc30
mc01 — ✓ — ✓
mc11 — — ✓ — ← this row
mc21 — — — —
mc31 — — — —
mc02 — — ✓ — ← mc02 + mc22 anchor
mc03 — — ✓ —
After this PR: 7 of 16 single-axis + diagonal positions done.
Remaining 9 are the off-axis quarter-pel combinations
(mc11/mc12/mc13/mc21/mc23/mc31/mc32/mc33) — each combines a 2D
lowpass intermediate with L2 averaging against a 1D-lowpass output.
Next PR scope.
Why no QPU shaders: same R-band logic as the prior CPU additions.
At ~10 ns per 8x8 NEON block, all 16 qpel positions together
would land in ~1.3 ms/frame at 1080p worst case — comfortably
inside the 33 ms budget. QPU shader for mc20 already exists
(cycle 9 / v3d_h264_qpel_mc20.spv); the other 15 follow once a
clear perf reason emerges.
586 lines
25 KiB
C
586 lines
25 KiB
C
/*
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* Phase 8a — H.264 kernels through the public API.
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*
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* Covers IDCT 4x4, IDCT 8x8, deblock luma vertical. Each kernel
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* exercised through daedalus_recipe_dispatch_* and compared to
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* the C reference. Recipe routes all 3 to CPU (per cycles 6+7+8
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* verdicts).
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <stddef.h>
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#include <string.h>
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#include "../include/daedalus.h"
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extern void daedalus_h264_idct_add_ref(uint8_t *dst, int16_t *block, ptrdiff_t stride);
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extern void daedalus_h264_idct8_add_ref(uint8_t *dst, int16_t *block, ptrdiff_t stride);
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extern void daedalus_h264_h_loop_filter_luma_ref(uint8_t *pix, ptrdiff_t stride,
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int alpha, int beta, int8_t tc0[4]);
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extern void daedalus_h264_v_loop_filter_chroma_ref(uint8_t *pix, ptrdiff_t stride,
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int alpha, int beta, int8_t tc0[4]);
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extern void daedalus_h264_h_loop_filter_chroma_ref(uint8_t *pix, ptrdiff_t stride,
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int alpha, int beta, int8_t tc0[4]);
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extern void daedalus_h264_v_loop_filter_luma_intra_ref(uint8_t *pix, ptrdiff_t stride,
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int alpha, int beta);
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extern void daedalus_h264_h_loop_filter_luma_intra_ref(uint8_t *pix, ptrdiff_t stride,
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int alpha, int beta);
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extern void daedalus_h264_v_loop_filter_chroma_intra_ref(uint8_t *pix, ptrdiff_t stride,
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int alpha, int beta);
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extern void daedalus_h264_h_loop_filter_chroma_intra_ref(uint8_t *pix, ptrdiff_t stride,
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int alpha, int beta);
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extern void daedalus_h264_v_loop_filter_luma_ref(uint8_t *pix, ptrdiff_t stride,
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int alpha, int beta, int8_t tc0[4]);
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extern void daedalus_put_h264_qpel8_mc02_ref(uint8_t *dst, const uint8_t *src,
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ptrdiff_t stride);
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extern void daedalus_put_h264_qpel8_mc22_ref(uint8_t *dst, const uint8_t *src,
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ptrdiff_t stride);
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extern void daedalus_put_h264_qpel8_mc10_ref(uint8_t *dst, const uint8_t *src,
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ptrdiff_t stride);
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extern void daedalus_put_h264_qpel8_mc30_ref(uint8_t *dst, const uint8_t *src,
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ptrdiff_t stride);
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extern void daedalus_put_h264_qpel8_mc01_ref(uint8_t *dst, const uint8_t *src,
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ptrdiff_t stride);
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extern void daedalus_put_h264_qpel8_mc03_ref(uint8_t *dst, const uint8_t *src,
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ptrdiff_t stride);
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extern void daedalus_put_h264_qpel8_mc20_ref(uint8_t *dst, const uint8_t *src,
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ptrdiff_t stride);
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static uint64_t xs_state = 0xa11264ULL;
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static inline uint64_t xs(void) {
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uint64_t x = xs_state;
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x ^= x << 13; x ^= x >> 7; x ^= x << 17;
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return xs_state = x;
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}
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static int test_idct4(void)
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{
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enum { N = 64, STRIDE = 64, BYTES = 8 * STRIDE };
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daedalus_ctx *ctx = daedalus_ctx_create();
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if (!ctx) return 1;
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int16_t coeffs[N * 16], coeffs_ref[N * 16];
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uint8_t dst[BYTES], dst_ref[BYTES];
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daedalus_h264_block_meta meta[N];
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/* Layout: 8x8 grid of 4x4 blocks (each 4x4 occupies 4 rows x 4 cols).
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* Block (bx, by) at byte offset by*4*STRIDE + bx*4. Need BYTES big
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* enough: 8 row-blocks * 4 rows = 32 rows × 64 stride = 2048. Use
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* 8 row-blocks. */
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enum { BX = 8, BY = 8, FULL_BYTES = BY * 4 * STRIDE };
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uint8_t big_dst[FULL_BYTES], big_dst_ref[FULL_BYTES];
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for (int i = 0; i < FULL_BYTES; i++)
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big_dst[i] = big_dst_ref[i] = (uint8_t)(xs() & 0xff);
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for (int i = 0; i < N * 16; i++) coeffs_ref[i] = coeffs[i] = (int16_t)((int)(xs() % 1024) - 512);
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for (int by = 0; by < BY; by++) for (int bx = 0; bx < BX; bx++) {
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int i = by * BX + bx;
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meta[i].dst_off = by * 4 * STRIDE + bx * 4;
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}
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for (int i = 0; i < N; i++)
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daedalus_h264_idct_add_ref(big_dst_ref + meta[i].dst_off,
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coeffs_ref + i * 16, STRIDE);
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int rc = daedalus_recipe_dispatch_h264_idct4(ctx, big_dst, STRIDE,
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coeffs, N, meta);
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if (rc) { fprintf(stderr, "idct4 dispatch rc=%d\n", rc); return 1; }
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int diff = 0;
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for (int i = 0; i < FULL_BYTES; i++) if (big_dst[i] != big_dst_ref[i]) diff++;
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printf(" H.264 IDCT 4x4: %d/%d bytes bit-exact (%.4f%%)\n",
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FULL_BYTES - diff, FULL_BYTES, 100.0 * (FULL_BYTES - diff) / FULL_BYTES);
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daedalus_ctx_destroy(ctx);
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return diff == 0 ? 0 : 1;
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}
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static int test_idct8(void)
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{
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enum { N = 16, STRIDE = 64, BYTES = (8 * 4) * STRIDE };
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daedalus_ctx *ctx = daedalus_ctx_create();
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if (!ctx) return 1;
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int16_t coeffs[N * 64], coeffs_ref[N * 64];
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uint8_t dst[BYTES], dst_ref[BYTES];
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daedalus_h264_block_meta meta[N];
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for (int i = 0; i < BYTES; i++) dst[i] = dst_ref[i] = (uint8_t)(xs() & 0xff);
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for (int i = 0; i < N * 64; i++) coeffs_ref[i] = coeffs[i] = (int16_t)((int)(xs() % 2048) - 1024);
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/* 8 blocks per row × 4 row-blocks = 32 blocks. Use 8 cols × 2 rows-of-blocks
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* for safety inside BYTES. Actually BYTES = 32*64 = 2048, supports 8*8=64
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* blocks. Let me use 8 cols × 2 rows of blocks = 16 blocks. */
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int BX = 8, BY = 2; /* 16 blocks total */
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for (int by = 0; by < BY; by++) for (int bx = 0; bx < BX; bx++) {
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int i = by * BX + bx;
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meta[i].dst_off = by * 8 * STRIDE + bx * 8;
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}
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for (int i = 0; i < N; i++)
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daedalus_h264_idct8_add_ref(dst_ref + meta[i].dst_off,
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coeffs_ref + i * 64, STRIDE);
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int rc = daedalus_recipe_dispatch_h264_idct8(ctx, dst, STRIDE,
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coeffs, N, meta);
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if (rc) { fprintf(stderr, "idct8 dispatch rc=%d\n", rc); return 1; }
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int diff = 0;
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for (int i = 0; i < BYTES; i++) if (dst[i] != dst_ref[i]) diff++;
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printf(" H.264 IDCT 8x8: %d/%d bytes bit-exact (%.4f%%)\n",
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BYTES - diff, BYTES, 100.0 * (BYTES - diff) / BYTES);
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daedalus_ctx_destroy(ctx);
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return diff == 0 ? 0 : 1;
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}
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static int test_deblock(void)
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{
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/* One edge per 16x16 tile. */
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enum { N_EDGES = 8, TILE_STRIDE = 16, TILE_BYTES = 16 * TILE_STRIDE,
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TOTAL = N_EDGES * TILE_BYTES, EDGE_ROW = 4, EDGE_OFF = EDGE_ROW * TILE_STRIDE };
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daedalus_ctx *ctx = daedalus_ctx_create();
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if (!ctx) return 1;
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uint8_t dst[TOTAL], dst_ref[TOTAL];
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daedalus_h264_deblock_meta meta[N_EDGES];
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for (int i = 0; i < TOTAL; i++) dst[i] = dst_ref[i] = (uint8_t)(xs() & 0xff);
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for (int i = 0; i < N_EDGES; i++) {
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meta[i].dst_off = i * TILE_BYTES + EDGE_OFF;
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meta[i].alpha = (int)(xs() % 64) + 1;
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meta[i].beta = (int)(xs() % 16) + 1;
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for (int s = 0; s < 4; s++) {
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int r = (int)(xs() % 8);
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meta[i].tc0[s] = (int8_t)(r == 0 ? -1 : (r - 1));
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}
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}
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for (int i = 0; i < N_EDGES; i++) {
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int8_t tc0_local[4] = { meta[i].tc0[0], meta[i].tc0[1], meta[i].tc0[2], meta[i].tc0[3] };
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daedalus_h264_v_loop_filter_luma_ref(dst_ref + meta[i].dst_off, TILE_STRIDE,
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meta[i].alpha, meta[i].beta, tc0_local);
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}
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int rc = daedalus_recipe_dispatch_h264_deblock_luma_v(ctx, dst, TILE_STRIDE,
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N_EDGES, meta);
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if (rc) { fprintf(stderr, "deblock dispatch rc=%d\n", rc); return 1; }
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int diff = 0;
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for (int i = 0; i < TOTAL; i++) if (dst[i] != dst_ref[i]) diff++;
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printf(" H.264 deblock luma v: %d/%d bytes bit-exact (%.4f%%)\n",
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TOTAL - diff, TOTAL, 100.0 * (TOTAL - diff) / TOTAL);
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daedalus_ctx_destroy(ctx);
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return diff == 0 ? 0 : 1;
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}
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static int test_deblock_h(void)
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{
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/* Mirror of test_deblock but for the H variant. Per-tile layout
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* is now 8 cols x 16 rows (one vertical edge between cols 3 and 4
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* of the tile); EDGE_COL = 4 puts dst_off at the leftmost output
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* column of the right block so the kernel's pix[-4..+3] read sits
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* inside the tile. */
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enum { N_EDGES = 8, TILE_STRIDE = 8, TILE_ROWS = 16,
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TILE_BYTES = TILE_STRIDE * TILE_ROWS,
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TOTAL = N_EDGES * TILE_BYTES, EDGE_COL = 4 };
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daedalus_ctx *ctx = daedalus_ctx_create();
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if (!ctx) return 1;
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uint8_t dst[TOTAL], dst_ref[TOTAL];
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daedalus_h264_deblock_meta meta[N_EDGES];
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for (int i = 0; i < TOTAL; i++) dst[i] = dst_ref[i] = (uint8_t)(xs() & 0xff);
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for (int i = 0; i < N_EDGES; i++) {
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meta[i].dst_off = i * TILE_BYTES + EDGE_COL;
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meta[i].alpha = (int)(xs() % 64) + 1;
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meta[i].beta = (int)(xs() % 16) + 1;
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for (int s = 0; s < 4; s++) {
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int r = (int)(xs() % 8);
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meta[i].tc0[s] = (int8_t)(r == 0 ? -1 : (r - 1));
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}
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}
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for (int i = 0; i < N_EDGES; i++) {
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int8_t tc0_local[4] = { meta[i].tc0[0], meta[i].tc0[1], meta[i].tc0[2], meta[i].tc0[3] };
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daedalus_h264_h_loop_filter_luma_ref(dst_ref + meta[i].dst_off, TILE_STRIDE,
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meta[i].alpha, meta[i].beta, tc0_local);
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}
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int rc = daedalus_recipe_dispatch_h264_deblock_luma_h(ctx, dst, TILE_STRIDE,
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N_EDGES, meta);
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if (rc) { fprintf(stderr, "deblock_h dispatch rc=%d\n", rc); return 1; }
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int diff = 0;
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for (int i = 0; i < TOTAL; i++) if (dst[i] != dst_ref[i]) diff++;
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printf(" H.264 deblock luma h: %d/%d bytes bit-exact (%.4f%%)\n",
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TOTAL - diff, TOTAL, 100.0 * (TOTAL - diff) / TOTAL);
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daedalus_ctx_destroy(ctx);
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return diff == 0 ? 0 : 1;
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}
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static int test_deblock_chroma_v(void)
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{
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/* Chroma V: per-tile 8 cols × 4 rows, edge between rows 1 and 2
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* (EDGE_ROW=2 lets the kernel read pix[-2..+1]*stride safely). */
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enum { N_EDGES = 8, TILE_STRIDE = 8, TILE_ROWS = 4,
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TILE_BYTES = TILE_STRIDE * TILE_ROWS,
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TOTAL = N_EDGES * TILE_BYTES, EDGE_ROW = 2,
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EDGE_OFF = EDGE_ROW * TILE_STRIDE };
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daedalus_ctx *ctx = daedalus_ctx_create();
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if (!ctx) return 1;
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uint8_t dst[TOTAL], dst_ref[TOTAL];
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daedalus_h264_deblock_meta meta[N_EDGES];
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for (int i = 0; i < TOTAL; i++) dst[i] = dst_ref[i] = (uint8_t)(xs() & 0xff);
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for (int i = 0; i < N_EDGES; i++) {
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meta[i].dst_off = i * TILE_BYTES + EDGE_OFF;
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meta[i].alpha = (int)(xs() % 64) + 1;
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meta[i].beta = (int)(xs() % 16) + 1;
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for (int s = 0; s < 4; s++) {
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int r = (int)(xs() % 8);
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meta[i].tc0[s] = (int8_t)(r == 0 ? -1 : (r - 1));
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}
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}
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for (int i = 0; i < N_EDGES; i++) {
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int8_t tc0_local[4] = { meta[i].tc0[0], meta[i].tc0[1], meta[i].tc0[2], meta[i].tc0[3] };
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daedalus_h264_v_loop_filter_chroma_ref(dst_ref + meta[i].dst_off, TILE_STRIDE,
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meta[i].alpha, meta[i].beta, tc0_local);
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}
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int rc = daedalus_recipe_dispatch_h264_deblock_chroma_v(ctx, dst, TILE_STRIDE,
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N_EDGES, meta);
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if (rc) { fprintf(stderr, "deblock_chroma_v dispatch rc=%d\n", rc); return 1; }
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int diff = 0;
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for (int i = 0; i < TOTAL; i++) if (dst[i] != dst_ref[i]) diff++;
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printf(" H.264 deblock chroma v: %d/%d bytes bit-exact (%.4f%%)\n",
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TOTAL - diff, TOTAL, 100.0 * (TOTAL - diff) / TOTAL);
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daedalus_ctx_destroy(ctx);
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return diff == 0 ? 0 : 1;
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}
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static int test_deblock_chroma_h(void)
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{
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/* Chroma H: per-tile 4 cols × 8 rows, edge between cols 1 and 2
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* (EDGE_COL=2 lets the kernel read pix[-2..+1] safely). */
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enum { N_EDGES = 8, TILE_STRIDE = 4, TILE_ROWS = 8,
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TILE_BYTES = TILE_STRIDE * TILE_ROWS,
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TOTAL = N_EDGES * TILE_BYTES, EDGE_COL = 2 };
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daedalus_ctx *ctx = daedalus_ctx_create();
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if (!ctx) return 1;
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uint8_t dst[TOTAL], dst_ref[TOTAL];
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daedalus_h264_deblock_meta meta[N_EDGES];
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for (int i = 0; i < TOTAL; i++) dst[i] = dst_ref[i] = (uint8_t)(xs() & 0xff);
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for (int i = 0; i < N_EDGES; i++) {
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meta[i].dst_off = i * TILE_BYTES + EDGE_COL;
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meta[i].alpha = (int)(xs() % 64) + 1;
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meta[i].beta = (int)(xs() % 16) + 1;
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for (int s = 0; s < 4; s++) {
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int r = (int)(xs() % 8);
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meta[i].tc0[s] = (int8_t)(r == 0 ? -1 : (r - 1));
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}
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}
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for (int i = 0; i < N_EDGES; i++) {
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int8_t tc0_local[4] = { meta[i].tc0[0], meta[i].tc0[1], meta[i].tc0[2], meta[i].tc0[3] };
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daedalus_h264_h_loop_filter_chroma_ref(dst_ref + meta[i].dst_off, TILE_STRIDE,
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meta[i].alpha, meta[i].beta, tc0_local);
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}
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int rc = daedalus_recipe_dispatch_h264_deblock_chroma_h(ctx, dst, TILE_STRIDE,
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N_EDGES, meta);
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if (rc) { fprintf(stderr, "deblock_chroma_h dispatch rc=%d\n", rc); return 1; }
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int diff = 0;
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for (int i = 0; i < TOTAL; i++) if (dst[i] != dst_ref[i]) diff++;
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printf(" H.264 deblock chroma h: %d/%d bytes bit-exact (%.4f%%)\n",
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TOTAL - diff, TOTAL, 100.0 * (TOTAL - diff) / TOTAL);
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daedalus_ctx_destroy(ctx);
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return diff == 0 ? 0 : 1;
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}
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/* --- bS=4 intra-strength deblock tests ---
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* Tile geometry per orientation matches the bS<4 variant; only the
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* dispatch + reference function change. alpha/beta are non-trivial
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* (the C ref + NEON both early-return when alpha|beta == 0).
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*/
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typedef struct {
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const char *name;
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int n_edges, tile_stride, tile_rows, edge_off;
|
||
void (*ref)(uint8_t *pix, ptrdiff_t stride, int alpha, int beta);
|
||
int (*dispatch)(daedalus_ctx *ctx, uint8_t *dst, size_t dst_stride,
|
||
size_t n_edges, const daedalus_h264_deblock_meta *meta);
|
||
} intra_test_spec;
|
||
|
||
static int run_intra_test(const intra_test_spec *t)
|
||
{
|
||
int total = t->n_edges * t->tile_stride * t->tile_rows;
|
||
daedalus_ctx *ctx = daedalus_ctx_create();
|
||
if (!ctx) return 1;
|
||
|
||
uint8_t *dst = malloc((size_t) total);
|
||
uint8_t *dst_ref = malloc((size_t) total);
|
||
daedalus_h264_deblock_meta *meta = calloc((size_t) t->n_edges, sizeof(*meta));
|
||
if (!dst || !dst_ref || !meta) return 1;
|
||
|
||
for (int i = 0; i < total; i++) dst[i] = dst_ref[i] = (uint8_t)(xs() & 0xff);
|
||
int tile_bytes = t->tile_stride * t->tile_rows;
|
||
for (int i = 0; i < t->n_edges; i++) {
|
||
meta[i].dst_off = (uint32_t)(i * tile_bytes + t->edge_off);
|
||
meta[i].alpha = (int)(xs() % 64) + 1;
|
||
meta[i].beta = (int)(xs() % 16) + 1;
|
||
/* tc0[] unused for intra; leave at 0 from calloc. */
|
||
}
|
||
for (int i = 0; i < t->n_edges; i++) {
|
||
t->ref(dst_ref + meta[i].dst_off,
|
||
(ptrdiff_t) t->tile_stride,
|
||
meta[i].alpha, meta[i].beta);
|
||
}
|
||
int rc = t->dispatch(ctx, dst, (size_t) t->tile_stride,
|
||
(size_t) t->n_edges, meta);
|
||
if (rc) { fprintf(stderr, "%s dispatch rc=%d\n", t->name, rc); return 1; }
|
||
|
||
int diff = 0;
|
||
for (int i = 0; i < total; i++) if (dst[i] != dst_ref[i]) diff++;
|
||
printf(" H.264 deblock %s: %d/%d bytes bit-exact (%.4f%%)\n",
|
||
t->name, total - diff, total, 100.0 * (total - diff) / total);
|
||
|
||
free(meta); free(dst_ref); free(dst);
|
||
daedalus_ctx_destroy(ctx);
|
||
return diff == 0 ? 0 : 1;
|
||
}
|
||
|
||
static int test_deblock_intra_all(void)
|
||
{
|
||
intra_test_spec specs[] = {
|
||
{ "luma v intra", 8, 16, 8, 4 * 16,
|
||
daedalus_h264_v_loop_filter_luma_intra_ref,
|
||
daedalus_recipe_dispatch_h264_deblock_luma_v_intra },
|
||
{ "luma h intra", 8, 8, 16, 4,
|
||
daedalus_h264_h_loop_filter_luma_intra_ref,
|
||
daedalus_recipe_dispatch_h264_deblock_luma_h_intra },
|
||
{ "chroma v intra", 8, 8, 4, 2 * 8,
|
||
daedalus_h264_v_loop_filter_chroma_intra_ref,
|
||
daedalus_recipe_dispatch_h264_deblock_chroma_v_intra },
|
||
{ "chroma h intra", 8, 4, 8, 2,
|
||
daedalus_h264_h_loop_filter_chroma_intra_ref,
|
||
daedalus_recipe_dispatch_h264_deblock_chroma_h_intra },
|
||
};
|
||
int fail = 0;
|
||
for (size_t i = 0; i < sizeof(specs)/sizeof(specs[0]); i++)
|
||
fail |= run_intra_test(&specs[i]);
|
||
return fail;
|
||
}
|
||
|
||
static int test_qpel_mc20(void)
|
||
{
|
||
/* Cycle 9 — one 8x8 block per 16-wide row-tile, 8 tiles. Each tile
|
||
* holds rows 0..7; src[c-2..c+3] read via SRC_COL offset matches the
|
||
* cycle-9 bench convention so the same C reference and NEON .S can
|
||
* be compared. */
|
||
enum { N = 8, TILE_STRIDE = 16, TILE_ROWS = 8,
|
||
TILE_BYTES = TILE_ROWS * TILE_STRIDE, TOTAL = N * TILE_BYTES,
|
||
SRC_COL = 3 };
|
||
daedalus_ctx *ctx = daedalus_ctx_create();
|
||
if (!ctx) return 1;
|
||
|
||
uint8_t src[TOTAL], dst[TOTAL], dst_ref[TOTAL];
|
||
daedalus_h264_qpel_meta meta[N];
|
||
|
||
for (int i = 0; i < TOTAL; i++) src[i] = (uint8_t)(xs() & 0xff);
|
||
memset(dst, 0, sizeof(dst));
|
||
memset(dst_ref, 0, sizeof(dst_ref));
|
||
|
||
for (int i = 0; i < N; i++) {
|
||
meta[i].src_off = (uint32_t)(i * TILE_BYTES + SRC_COL);
|
||
meta[i].dst_off = (uint32_t)(i * TILE_BYTES + SRC_COL);
|
||
}
|
||
|
||
for (int i = 0; i < N; i++)
|
||
daedalus_put_h264_qpel8_mc20_ref(dst_ref + meta[i].dst_off,
|
||
src + meta[i].src_off,
|
||
TILE_STRIDE);
|
||
|
||
int rc = daedalus_recipe_dispatch_h264_qpel_mc20(ctx, dst, src,
|
||
TILE_STRIDE, N, meta);
|
||
if (rc) { fprintf(stderr, "qpel_mc20 dispatch rc=%d\n", rc); return 1; }
|
||
int diff = 0;
|
||
for (int i = 0; i < TOTAL; i++) if (dst[i] != dst_ref[i]) diff++;
|
||
printf(" H.264 qpel mc20: %d/%d bytes bit-exact (%.4f%%)\n",
|
||
TOTAL - diff, TOTAL, 100.0 * (TOTAL - diff) / TOTAL);
|
||
daedalus_ctx_destroy(ctx);
|
||
return diff == 0 ? 0 : 1;
|
||
}
|
||
|
||
static int test_qpel_mc02(void)
|
||
{
|
||
/* mc02: vertical 6-tap. Tile is 16 cols × 16 rows so the kernel
|
||
* can read rows [SRC_ROW-2 .. SRC_ROW+7+3] inside the buffer.
|
||
* SRC_ROW = 3 leaves rows -2..-1 above the output (rows 1..2 of
|
||
* the tile) and rows 8..10 below (rows 11..13). */
|
||
enum { N = 8, TILE_STRIDE = 16, TILE_ROWS = 16,
|
||
TILE_BYTES = TILE_ROWS * TILE_STRIDE, TOTAL = N * TILE_BYTES,
|
||
SRC_ROW = 3 };
|
||
daedalus_ctx *ctx = daedalus_ctx_create();
|
||
if (!ctx) return 1;
|
||
|
||
uint8_t src[TOTAL], dst[TOTAL], dst_ref[TOTAL];
|
||
daedalus_h264_qpel_meta meta[N];
|
||
|
||
for (int i = 0; i < TOTAL; i++) src[i] = (uint8_t)(xs() & 0xff);
|
||
memset(dst, 0, sizeof(dst));
|
||
memset(dst_ref, 0, sizeof(dst_ref));
|
||
|
||
for (int i = 0; i < N; i++) {
|
||
meta[i].src_off = (uint32_t)(i * TILE_BYTES + SRC_ROW * TILE_STRIDE);
|
||
meta[i].dst_off = (uint32_t)(i * TILE_BYTES + SRC_ROW * TILE_STRIDE);
|
||
}
|
||
|
||
for (int i = 0; i < N; i++)
|
||
daedalus_put_h264_qpel8_mc02_ref(dst_ref + meta[i].dst_off,
|
||
src + meta[i].src_off,
|
||
TILE_STRIDE);
|
||
|
||
int rc = daedalus_recipe_dispatch_h264_qpel_mc02(ctx, dst, src,
|
||
TILE_STRIDE, N, meta);
|
||
if (rc) { fprintf(stderr, "qpel_mc02 dispatch rc=%d\n", rc); return 1; }
|
||
int diff = 0;
|
||
for (int i = 0; i < TOTAL; i++) if (dst[i] != dst_ref[i]) diff++;
|
||
printf(" H.264 qpel mc02: %d/%d bytes bit-exact (%.4f%%)\n",
|
||
TOTAL - diff, TOTAL, 100.0 * (TOTAL - diff) / TOTAL);
|
||
daedalus_ctx_destroy(ctx);
|
||
return diff == 0 ? 0 : 1;
|
||
}
|
||
|
||
static int test_qpel_mc22(void)
|
||
{
|
||
/* mc22: 2D HV lowpass. Needs 2 cols left + 3 cols right + 2 rows
|
||
* top + 3 rows bottom of context per 8x8 output. Tile is 16x16
|
||
* with output positioned at (SRC_ROW=3, SRC_COL=3) so the read
|
||
* range [SRC_*-2 .. SRC_*+7+3] stays inside the tile. */
|
||
enum { N = 8, TILE_STRIDE = 16, TILE_ROWS = 16,
|
||
TILE_BYTES = TILE_ROWS * TILE_STRIDE, TOTAL = N * TILE_BYTES,
|
||
SRC_ROW = 3, SRC_COL = 3 };
|
||
daedalus_ctx *ctx = daedalus_ctx_create();
|
||
if (!ctx) return 1;
|
||
|
||
uint8_t src[TOTAL], dst[TOTAL], dst_ref[TOTAL];
|
||
daedalus_h264_qpel_meta meta[N];
|
||
|
||
for (int i = 0; i < TOTAL; i++) src[i] = (uint8_t)(xs() & 0xff);
|
||
memset(dst, 0, sizeof(dst));
|
||
memset(dst_ref, 0, sizeof(dst_ref));
|
||
|
||
for (int i = 0; i < N; i++) {
|
||
meta[i].src_off = (uint32_t)(i * TILE_BYTES + SRC_ROW * TILE_STRIDE + SRC_COL);
|
||
meta[i].dst_off = (uint32_t)(i * TILE_BYTES + SRC_ROW * TILE_STRIDE + SRC_COL);
|
||
}
|
||
|
||
for (int i = 0; i < N; i++)
|
||
daedalus_put_h264_qpel8_mc22_ref(dst_ref + meta[i].dst_off,
|
||
src + meta[i].src_off,
|
||
TILE_STRIDE);
|
||
|
||
int rc = daedalus_recipe_dispatch_h264_qpel_mc22(ctx, dst, src,
|
||
TILE_STRIDE, N, meta);
|
||
if (rc) { fprintf(stderr, "qpel_mc22 dispatch rc=%d\n", rc); return 1; }
|
||
int diff = 0;
|
||
for (int i = 0; i < TOTAL; i++) if (dst[i] != dst_ref[i]) diff++;
|
||
printf(" H.264 qpel mc22: %d/%d bytes bit-exact (%.4f%%)\n",
|
||
TOTAL - diff, TOTAL, 100.0 * (TOTAL - diff) / TOTAL);
|
||
daedalus_ctx_destroy(ctx);
|
||
return diff == 0 ? 0 : 1;
|
||
}
|
||
|
||
/* Generic harness for the 4 single-axis quarter-pel positions; same
|
||
* tile geometry as mc22 since each one reads the largest of the H/V
|
||
* lowpass windows (mc10/mc30 need cols -2..+3, mc01/mc03 need rows
|
||
* -2..+3 OR +1..+3 on the integer side). */
|
||
typedef void (*qpel_ref_fn)(uint8_t *dst, const uint8_t *src, ptrdiff_t stride);
|
||
typedef int (*qpel_dispatch_fn)(daedalus_ctx *ctx, uint8_t *dst,
|
||
const uint8_t *src, size_t stride,
|
||
size_t n_blocks, const daedalus_h264_qpel_meta *meta);
|
||
|
||
static int run_quarter_axis_qpel(const char *name,
|
||
qpel_ref_fn ref, qpel_dispatch_fn dispatch)
|
||
{
|
||
enum { N = 8, TILE_STRIDE = 16, TILE_ROWS = 16,
|
||
TILE_BYTES = TILE_ROWS * TILE_STRIDE, TOTAL = N * TILE_BYTES,
|
||
SRC_ROW = 3, SRC_COL = 3 };
|
||
daedalus_ctx *ctx = daedalus_ctx_create();
|
||
if (!ctx) return 1;
|
||
|
||
uint8_t src[TOTAL], dst[TOTAL], dst_ref[TOTAL];
|
||
daedalus_h264_qpel_meta meta[N];
|
||
|
||
for (int i = 0; i < TOTAL; i++) src[i] = (uint8_t)(xs() & 0xff);
|
||
memset(dst, 0, sizeof(dst));
|
||
memset(dst_ref, 0, sizeof(dst_ref));
|
||
|
||
for (int i = 0; i < N; i++) {
|
||
meta[i].src_off = (uint32_t)(i * TILE_BYTES + SRC_ROW * TILE_STRIDE + SRC_COL);
|
||
meta[i].dst_off = (uint32_t)(i * TILE_BYTES + SRC_ROW * TILE_STRIDE + SRC_COL);
|
||
}
|
||
|
||
for (int i = 0; i < N; i++)
|
||
ref(dst_ref + meta[i].dst_off, src + meta[i].src_off, TILE_STRIDE);
|
||
|
||
int rc = dispatch(ctx, dst, src, TILE_STRIDE, N, meta);
|
||
if (rc) { fprintf(stderr, "%s dispatch rc=%d\n", name, rc); return 1; }
|
||
int diff = 0;
|
||
for (int i = 0; i < TOTAL; i++) if (dst[i] != dst_ref[i]) diff++;
|
||
printf(" H.264 qpel %s: %d/%d bytes bit-exact (%.4f%%)\n",
|
||
name, TOTAL - diff, TOTAL, 100.0 * (TOTAL - diff) / TOTAL);
|
||
daedalus_ctx_destroy(ctx);
|
||
return diff == 0 ? 0 : 1;
|
||
}
|
||
|
||
static int test_qpel_quarter_axis_all(void)
|
||
{
|
||
int fail = 0;
|
||
fail |= run_quarter_axis_qpel("mc10", daedalus_put_h264_qpel8_mc10_ref,
|
||
daedalus_recipe_dispatch_h264_qpel_mc10);
|
||
fail |= run_quarter_axis_qpel("mc30", daedalus_put_h264_qpel8_mc30_ref,
|
||
daedalus_recipe_dispatch_h264_qpel_mc30);
|
||
fail |= run_quarter_axis_qpel("mc01", daedalus_put_h264_qpel8_mc01_ref,
|
||
daedalus_recipe_dispatch_h264_qpel_mc01);
|
||
fail |= run_quarter_axis_qpel("mc03", daedalus_put_h264_qpel8_mc03_ref,
|
||
daedalus_recipe_dispatch_h264_qpel_mc03);
|
||
return fail;
|
||
}
|
||
|
||
int main(void)
|
||
{
|
||
printf("=== Phase 8a API smoke: H.264 kernels via recipe dispatch ===\n");
|
||
printf(" H264_IDCT4 recipe substrate: %d (1=CPU, 2=QPU)\n",
|
||
(int) daedalus_recipe_substrate_for(DAEDALUS_KERNEL_H264_IDCT4));
|
||
printf(" H264_IDCT8 recipe substrate: %d\n",
|
||
(int) daedalus_recipe_substrate_for(DAEDALUS_KERNEL_H264_IDCT8));
|
||
printf(" H264_DEBLOCK_LV recipe substrate: %d\n",
|
||
(int) daedalus_recipe_substrate_for(DAEDALUS_KERNEL_H264_DEBLOCK_LV));
|
||
printf(" H264_QPEL_MC20 recipe substrate: %d\n",
|
||
(int) daedalus_recipe_substrate_for(DAEDALUS_KERNEL_H264_QPEL_MC20));
|
||
|
||
printf(" H264_DEBLOCK_LH recipe substrate: %d (CPU, no QPU H shader yet)\n",
|
||
(int) daedalus_recipe_substrate_for(DAEDALUS_KERNEL_H264_DEBLOCK_LH));
|
||
printf(" H264_DEBLOCK_CV recipe substrate: %d (CPU)\n",
|
||
(int) daedalus_recipe_substrate_for(DAEDALUS_KERNEL_H264_DEBLOCK_CV));
|
||
printf(" H264_DEBLOCK_CH recipe substrate: %d (CPU)\n",
|
||
(int) daedalus_recipe_substrate_for(DAEDALUS_KERNEL_H264_DEBLOCK_CH));
|
||
printf(" H264_DEBLOCK_*_INTRA recipe substrate: %d (CPU, bS=4 set)\n",
|
||
(int) daedalus_recipe_substrate_for(DAEDALUS_KERNEL_H264_DEBLOCK_LV_INTRA));
|
||
|
||
int fail = 0;
|
||
fail |= test_idct4();
|
||
fail |= test_idct8();
|
||
fail |= test_deblock();
|
||
fail |= test_deblock_h();
|
||
fail |= test_deblock_chroma_v();
|
||
fail |= test_deblock_chroma_h();
|
||
fail |= test_deblock_intra_all();
|
||
fail |= test_qpel_mc20();
|
||
fail |= test_qpel_mc02();
|
||
fail |= test_qpel_mc22();
|
||
fail |= test_qpel_quarter_axis_all();
|
||
return fail;
|
||
}
|