1085c5699c
daedalus_ctx now owns a v3d_runner when V3D is available. The public API's dispatch_vp9_idct8 routes QPU calls through a new dispatch_idct8_qpu helper that: (1) lazy-creates the cycle 1 v4 pipeline on first use, (2) allocates 3 host-visible SSBOs per call (coeffs/dst/meta), (3) memcpy host->GPU, (4) dispatch with the v4 32-blocks-per-WG geometry, (5) memcpy GPU->host. Per-call alloc is intentional for Phase 8 correctness-first scope; buffer-pool perf optimization is deferred. Added daedalus_ctx_create_no_qpu() for fast-path callers that know they want CPU only. test_api_idct extended to a 3-mode matrix: CPU forced, QPU forced, AUTO recipe. All three deliver 4096/4096 bit-exact on hertz with V3D 7.1.7.0: recipe substrate for VP9_IDCT8: 2 (QPU) [CPU] 4096/4096 bit-exact [QPU] 4096/4096 bit-exact (real QPU dispatch through the API) [AUTO] 4096/4096 bit-exact (recipe routes to QPU) Next Phase 8 sub-step: same wiring pattern for cycle 2 LPF wd=4 and cycle 4 LPF wd=8 (the other two recipe-QPU kernels). Cycle 3 MC and cycle 5 CDEF only need the dispatch hook (recipe routes to CPU; QPU stays opportunistic via explicit override). Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
119 lines
4.4 KiB
C
119 lines
4.4 KiB
C
/*
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* Phase 8 — first end-to-end test through the public API.
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*
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* Exercises `daedalus_recipe_dispatch_vp9_idct8` end-to-end:
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* 1. Create context.
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* 2. Generate random VP9 coefficient blocks + dst pixels.
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* 3. Compute reference output via the C ref (tests/vp9_idct8_ref.c).
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* 4. Run public API dispatch on a copy of dst.
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* 5. Assert bit-exact.
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*
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* In Phase 8 skeleton, the API routes to CPU NEON (QPU dispatch
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* not yet wired through the API). Bit-exact gate against C ref
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* still passes because the underlying NEON kernel was the cycle 1
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* reference.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <stddef.h>
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#include <string.h>
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#include "../include/daedalus.h"
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extern void daedalus_vp9_idct_idct_8x8_add_ref(
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uint8_t *dst, ptrdiff_t stride, int16_t *block, int eob);
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#define BLOCKS_W 8
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#define BLOCKS_H 8
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#define N_BLOCKS (BLOCKS_W * BLOCKS_H)
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#define DST_STRIDE (BLOCKS_W * 8)
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#define DST_BYTES (BLOCKS_H * 8 * DST_STRIDE)
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static uint64_t xs_state = 0xa57edbeef5717ULL;
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static inline uint64_t xs(void) {
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uint64_t x = xs_state;
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x ^= x << 13; x ^= x >> 7; x ^= x << 17;
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return xs_state = x;
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}
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static int run_once(daedalus_substrate force,
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const int16_t *coeffs,
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const daedalus_idct8_meta *meta,
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const uint8_t *dst_initial,
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const uint8_t *dst_ref,
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const char *label)
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{
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daedalus_ctx *ctx = daedalus_ctx_create();
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if (!ctx) { fprintf(stderr, "ctx create failed\n"); return 1; }
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int has_qpu = daedalus_ctx_has_qpu(ctx);
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printf(" [%s] has_qpu=%d force=%d\n", label, has_qpu, (int) force);
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if (force == DAEDALUS_SUBSTRATE_QPU && !has_qpu) {
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printf(" SKIP — QPU unavailable on this host\n");
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daedalus_ctx_destroy(ctx); return 0;
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}
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uint8_t dst[DST_BYTES];
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memcpy(dst, dst_initial, DST_BYTES);
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int rc = daedalus_dispatch_vp9_idct8(ctx, force, dst, DST_STRIDE,
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coeffs, N_BLOCKS, meta);
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if (rc) { fprintf(stderr, " dispatch rc=%d\n", rc); daedalus_ctx_destroy(ctx); return 1; }
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int diffs = 0;
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for (int i = 0; i < DST_BYTES; i++) if (dst[i] != dst_ref[i]) diffs++;
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printf(" %d / %d bytes bit-exact (%.4f%%)\n",
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DST_BYTES - diffs, DST_BYTES, 100.0 * (DST_BYTES - diffs) / DST_BYTES);
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daedalus_ctx_destroy(ctx);
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return diffs == 0 ? 0 : 1;
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}
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int main(void)
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{
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printf("=== Phase 8 API smoke: VP9 IDCT 8x8 via recipe dispatch ===\n");
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printf(" recipe substrate for VP9_IDCT8: %d (1=CPU, 2=QPU)\n",
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(int) daedalus_recipe_substrate_for(DAEDALUS_KERNEL_VP9_IDCT8));
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/* Generate random VP9 IDCT inputs: 64-coef blocks + a dst surface. */
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int16_t coeffs[N_BLOCKS * 64];
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memset(coeffs, 0, sizeof(coeffs));
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for (int i = 0; i < N_BLOCKS; i++) {
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/* Sparse non-zero coefs to keep range realistic. */
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int n = 1 + (int)(xs() % 16);
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for (int j = 0; j < n; j++) {
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int pos = (int)(xs() % 64);
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int16_t v = (int16_t)((int)(xs() % 8192) - 4096);
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coeffs[i * 64 + pos] = v;
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}
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}
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uint8_t dst_ref[DST_BYTES], dst_initial[DST_BYTES];
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for (int i = 0; i < DST_BYTES; i++)
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dst_ref[i] = dst_initial[i] = (uint8_t)(xs() & 0xff);
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/* 8x8 grid of 8x8 blocks. Block (bx, by) at byte offset
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* by*8*stride + bx*8. */
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daedalus_idct8_meta meta[N_BLOCKS];
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for (int by = 0; by < BLOCKS_H; by++) {
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for (int bx = 0; bx < BLOCKS_W; bx++) {
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int i = by * BLOCKS_W + bx;
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meta[i].dst_off = (uint32_t)(by * 8 * DST_STRIDE + bx * 8);
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meta[i].block_x = (uint32_t) bx;
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meta[i].block_y = (uint32_t) by;
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meta[i]._pad = 0;
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}
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}
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/* Compute reference via the C ref (mutates a scratch copy of
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* coeffs because the C ref destroys its input). */
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int16_t scratch[64];
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for (int i = 0; i < N_BLOCKS; i++) {
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memcpy(scratch, coeffs + i * 64, 64 * sizeof(int16_t));
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daedalus_vp9_idct_idct_8x8_add_ref(dst_ref + meta[i].dst_off,
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DST_STRIDE, scratch, 64);
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}
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int fail = 0;
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fail |= run_once(DAEDALUS_SUBSTRATE_CPU, coeffs, meta, dst_initial, dst_ref, "CPU");
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fail |= run_once(DAEDALUS_SUBSTRATE_QPU, coeffs, meta, dst_initial, dst_ref, "QPU");
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fail |= run_once(DAEDALUS_SUBSTRATE_AUTO, coeffs, meta, dst_initial, dst_ref, "AUTO");
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return fail;
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}
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