claude-noether
9d5451e0fe
Adds the horizontal-edge sibling of cycle 8's deblock_luma_v. The
vendored FFmpeg snapshot already includes ff_h264_h_loop_filter_luma_neon
in libavcodec/aarch64/h264dsp_neon.S — this PR wires up the symbol,
the bit-exact reference, and the recipe-table entry so daedalus-decoder
and other consumers can call the H variant through the same dispatch
shape they use for _v.
Scope:
- Public API: daedalus_dispatch_h264_deblock_luma_h(ctx, sub, ...)
+ daedalus_recipe_dispatch_h264_deblock_luma_h(ctx, ...) wrapper.
- Internal: dispatch_h264_deblock_h_cpu() calls the NEON entry.
- Recipe table: new DAEDALUS_KERNEL_H264_DEBLOCK_LH = 10, mapped
to DAEDALUS_SUBSTRATE_CPU until a QPU shader is written. An
explicit SUBSTRATE_QPU request on the H dispatch returns -1
(fails fast, no silent CPU degradation).
- C reference: tests/h264_h_loop_filter_luma_ref.c — the
column-axis transpose of h264_deblock_ref.c. Same per-segment
kernel; pix[-4..+3] accesses cols instead of rows*stride.
- Test: test_api_h264 grows a test_deblock_h() with 8 tiles
(8 cols x 16 rows each, edge at col 4), random alpha/beta/tc0;
compares NEON dispatch against reference byte-for-byte.
Verified on hertz (Pi 5 / V3D 7.1):
$ ./build/test_api_h264
=== Phase 8a API smoke: H.264 kernels via recipe dispatch ===
H264_IDCT4 recipe substrate: 2 (1=CPU, 2=QPU)
H264_IDCT8 recipe substrate: 2
H264_DEBLOCK_LV recipe substrate: 2
H264_QPEL_MC20 recipe substrate: 2
H264_DEBLOCK_LH recipe substrate: 1 (CPU, no QPU H shader yet)
H.264 IDCT 4x4: 2048/2048 bytes bit-exact (100.0000%)
H.264 IDCT 8x8: 2048/2048 bytes bit-exact (100.0000%)
H.264 deblock luma v: 2048/2048 bytes bit-exact (100.0000%)
H.264 deblock luma h: 1024/1024 bytes bit-exact (100.0000%)
H.264 qpel mc20: 1024/1024 bytes bit-exact (100.0000%)
All 5 kernels bit-exact PASS. The new H variant joins the suite
with 1024 random-input bytes per tile x 8 tiles.
Why CPU-only for now: the daedalus-decoder downstream needs the H
edge dispatched somewhere — even at CPU NEON cost (~6 ns/edge per
the cycle 8 M3 baseline) a frame's worth at 1080p is
~ 8160 MBs * 4 edges = 32 640 edges = ~200 us — well inside the
30 fps budget. Writing the V3D H-edge shader is a follow-up
(would be cycle 8' or similar; the V-edge shader's transpose isn't
mechanical because of how the workgroup organisation maps to columns
vs rows).
Backlog addition (out of scope for this PR):
- V3D shader for the H variant (mirror of v3d_h264deblock.spv).
- bS=4 intra-strength filter (different algebra; both _v and _h).
- Chroma deblock luma_v/_h (8-cell variants).
257 lines
10 KiB
C
257 lines
10 KiB
C
/*
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* Phase 8a — H.264 kernels through the public API.
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*
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* Covers IDCT 4x4, IDCT 8x8, deblock luma vertical. Each kernel
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* exercised through daedalus_recipe_dispatch_* and compared to
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* the C reference. Recipe routes all 3 to CPU (per cycles 6+7+8
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* verdicts).
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <stddef.h>
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#include <string.h>
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#include "../include/daedalus.h"
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extern void daedalus_h264_idct_add_ref(uint8_t *dst, int16_t *block, ptrdiff_t stride);
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extern void daedalus_h264_idct8_add_ref(uint8_t *dst, int16_t *block, ptrdiff_t stride);
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extern void daedalus_h264_h_loop_filter_luma_ref(uint8_t *pix, ptrdiff_t stride,
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int alpha, int beta, int8_t tc0[4]);
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extern void daedalus_h264_v_loop_filter_luma_ref(uint8_t *pix, ptrdiff_t stride,
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int alpha, int beta, int8_t tc0[4]);
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extern void daedalus_put_h264_qpel8_mc20_ref(uint8_t *dst, const uint8_t *src,
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ptrdiff_t stride);
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static uint64_t xs_state = 0xa11264ULL;
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static inline uint64_t xs(void) {
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uint64_t x = xs_state;
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x ^= x << 13; x ^= x >> 7; x ^= x << 17;
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return xs_state = x;
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}
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static int test_idct4(void)
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{
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enum { N = 64, STRIDE = 64, BYTES = 8 * STRIDE };
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daedalus_ctx *ctx = daedalus_ctx_create();
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if (!ctx) return 1;
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int16_t coeffs[N * 16], coeffs_ref[N * 16];
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uint8_t dst[BYTES], dst_ref[BYTES];
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daedalus_h264_block_meta meta[N];
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/* Layout: 8x8 grid of 4x4 blocks (each 4x4 occupies 4 rows x 4 cols).
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* Block (bx, by) at byte offset by*4*STRIDE + bx*4. Need BYTES big
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* enough: 8 row-blocks * 4 rows = 32 rows × 64 stride = 2048. Use
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* 8 row-blocks. */
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enum { BX = 8, BY = 8, FULL_BYTES = BY * 4 * STRIDE };
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uint8_t big_dst[FULL_BYTES], big_dst_ref[FULL_BYTES];
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for (int i = 0; i < FULL_BYTES; i++)
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big_dst[i] = big_dst_ref[i] = (uint8_t)(xs() & 0xff);
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for (int i = 0; i < N * 16; i++) coeffs_ref[i] = coeffs[i] = (int16_t)((int)(xs() % 1024) - 512);
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for (int by = 0; by < BY; by++) for (int bx = 0; bx < BX; bx++) {
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int i = by * BX + bx;
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meta[i].dst_off = by * 4 * STRIDE + bx * 4;
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}
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for (int i = 0; i < N; i++)
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daedalus_h264_idct_add_ref(big_dst_ref + meta[i].dst_off,
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coeffs_ref + i * 16, STRIDE);
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int rc = daedalus_recipe_dispatch_h264_idct4(ctx, big_dst, STRIDE,
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coeffs, N, meta);
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if (rc) { fprintf(stderr, "idct4 dispatch rc=%d\n", rc); return 1; }
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int diff = 0;
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for (int i = 0; i < FULL_BYTES; i++) if (big_dst[i] != big_dst_ref[i]) diff++;
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printf(" H.264 IDCT 4x4: %d/%d bytes bit-exact (%.4f%%)\n",
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FULL_BYTES - diff, FULL_BYTES, 100.0 * (FULL_BYTES - diff) / FULL_BYTES);
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daedalus_ctx_destroy(ctx);
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return diff == 0 ? 0 : 1;
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}
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static int test_idct8(void)
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{
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enum { N = 16, STRIDE = 64, BYTES = (8 * 4) * STRIDE };
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daedalus_ctx *ctx = daedalus_ctx_create();
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if (!ctx) return 1;
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int16_t coeffs[N * 64], coeffs_ref[N * 64];
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uint8_t dst[BYTES], dst_ref[BYTES];
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daedalus_h264_block_meta meta[N];
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for (int i = 0; i < BYTES; i++) dst[i] = dst_ref[i] = (uint8_t)(xs() & 0xff);
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for (int i = 0; i < N * 64; i++) coeffs_ref[i] = coeffs[i] = (int16_t)((int)(xs() % 2048) - 1024);
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/* 8 blocks per row × 4 row-blocks = 32 blocks. Use 8 cols × 2 rows-of-blocks
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* for safety inside BYTES. Actually BYTES = 32*64 = 2048, supports 8*8=64
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* blocks. Let me use 8 cols × 2 rows of blocks = 16 blocks. */
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int BX = 8, BY = 2; /* 16 blocks total */
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for (int by = 0; by < BY; by++) for (int bx = 0; bx < BX; bx++) {
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int i = by * BX + bx;
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meta[i].dst_off = by * 8 * STRIDE + bx * 8;
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}
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for (int i = 0; i < N; i++)
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daedalus_h264_idct8_add_ref(dst_ref + meta[i].dst_off,
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coeffs_ref + i * 64, STRIDE);
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int rc = daedalus_recipe_dispatch_h264_idct8(ctx, dst, STRIDE,
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coeffs, N, meta);
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if (rc) { fprintf(stderr, "idct8 dispatch rc=%d\n", rc); return 1; }
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int diff = 0;
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for (int i = 0; i < BYTES; i++) if (dst[i] != dst_ref[i]) diff++;
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printf(" H.264 IDCT 8x8: %d/%d bytes bit-exact (%.4f%%)\n",
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BYTES - diff, BYTES, 100.0 * (BYTES - diff) / BYTES);
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daedalus_ctx_destroy(ctx);
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return diff == 0 ? 0 : 1;
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}
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static int test_deblock(void)
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{
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/* One edge per 16x16 tile. */
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enum { N_EDGES = 8, TILE_STRIDE = 16, TILE_BYTES = 16 * TILE_STRIDE,
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TOTAL = N_EDGES * TILE_BYTES, EDGE_ROW = 4, EDGE_OFF = EDGE_ROW * TILE_STRIDE };
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daedalus_ctx *ctx = daedalus_ctx_create();
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if (!ctx) return 1;
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uint8_t dst[TOTAL], dst_ref[TOTAL];
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daedalus_h264_deblock_meta meta[N_EDGES];
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for (int i = 0; i < TOTAL; i++) dst[i] = dst_ref[i] = (uint8_t)(xs() & 0xff);
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for (int i = 0; i < N_EDGES; i++) {
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meta[i].dst_off = i * TILE_BYTES + EDGE_OFF;
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meta[i].alpha = (int)(xs() % 64) + 1;
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meta[i].beta = (int)(xs() % 16) + 1;
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for (int s = 0; s < 4; s++) {
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int r = (int)(xs() % 8);
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meta[i].tc0[s] = (int8_t)(r == 0 ? -1 : (r - 1));
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}
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}
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for (int i = 0; i < N_EDGES; i++) {
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int8_t tc0_local[4] = { meta[i].tc0[0], meta[i].tc0[1], meta[i].tc0[2], meta[i].tc0[3] };
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daedalus_h264_v_loop_filter_luma_ref(dst_ref + meta[i].dst_off, TILE_STRIDE,
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meta[i].alpha, meta[i].beta, tc0_local);
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}
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int rc = daedalus_recipe_dispatch_h264_deblock_luma_v(ctx, dst, TILE_STRIDE,
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N_EDGES, meta);
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if (rc) { fprintf(stderr, "deblock dispatch rc=%d\n", rc); return 1; }
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int diff = 0;
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for (int i = 0; i < TOTAL; i++) if (dst[i] != dst_ref[i]) diff++;
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printf(" H.264 deblock luma v: %d/%d bytes bit-exact (%.4f%%)\n",
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TOTAL - diff, TOTAL, 100.0 * (TOTAL - diff) / TOTAL);
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daedalus_ctx_destroy(ctx);
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return diff == 0 ? 0 : 1;
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}
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static int test_deblock_h(void)
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{
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/* Mirror of test_deblock but for the H variant. Per-tile layout
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* is now 8 cols x 16 rows (one vertical edge between cols 3 and 4
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* of the tile); EDGE_COL = 4 puts dst_off at the leftmost output
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* column of the right block so the kernel's pix[-4..+3] read sits
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* inside the tile. */
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enum { N_EDGES = 8, TILE_STRIDE = 8, TILE_ROWS = 16,
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TILE_BYTES = TILE_STRIDE * TILE_ROWS,
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TOTAL = N_EDGES * TILE_BYTES, EDGE_COL = 4 };
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daedalus_ctx *ctx = daedalus_ctx_create();
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if (!ctx) return 1;
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uint8_t dst[TOTAL], dst_ref[TOTAL];
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daedalus_h264_deblock_meta meta[N_EDGES];
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for (int i = 0; i < TOTAL; i++) dst[i] = dst_ref[i] = (uint8_t)(xs() & 0xff);
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for (int i = 0; i < N_EDGES; i++) {
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meta[i].dst_off = i * TILE_BYTES + EDGE_COL;
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meta[i].alpha = (int)(xs() % 64) + 1;
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meta[i].beta = (int)(xs() % 16) + 1;
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for (int s = 0; s < 4; s++) {
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int r = (int)(xs() % 8);
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meta[i].tc0[s] = (int8_t)(r == 0 ? -1 : (r - 1));
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}
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}
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for (int i = 0; i < N_EDGES; i++) {
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int8_t tc0_local[4] = { meta[i].tc0[0], meta[i].tc0[1], meta[i].tc0[2], meta[i].tc0[3] };
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daedalus_h264_h_loop_filter_luma_ref(dst_ref + meta[i].dst_off, TILE_STRIDE,
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meta[i].alpha, meta[i].beta, tc0_local);
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}
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int rc = daedalus_recipe_dispatch_h264_deblock_luma_h(ctx, dst, TILE_STRIDE,
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N_EDGES, meta);
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if (rc) { fprintf(stderr, "deblock_h dispatch rc=%d\n", rc); return 1; }
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int diff = 0;
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for (int i = 0; i < TOTAL; i++) if (dst[i] != dst_ref[i]) diff++;
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printf(" H.264 deblock luma h: %d/%d bytes bit-exact (%.4f%%)\n",
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TOTAL - diff, TOTAL, 100.0 * (TOTAL - diff) / TOTAL);
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daedalus_ctx_destroy(ctx);
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return diff == 0 ? 0 : 1;
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}
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static int test_qpel_mc20(void)
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{
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/* Cycle 9 — one 8x8 block per 16-wide row-tile, 8 tiles. Each tile
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* holds rows 0..7; src[c-2..c+3] read via SRC_COL offset matches the
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* cycle-9 bench convention so the same C reference and NEON .S can
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* be compared. */
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enum { N = 8, TILE_STRIDE = 16, TILE_ROWS = 8,
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TILE_BYTES = TILE_ROWS * TILE_STRIDE, TOTAL = N * TILE_BYTES,
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SRC_COL = 3 };
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daedalus_ctx *ctx = daedalus_ctx_create();
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if (!ctx) return 1;
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uint8_t src[TOTAL], dst[TOTAL], dst_ref[TOTAL];
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daedalus_h264_qpel_meta meta[N];
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for (int i = 0; i < TOTAL; i++) src[i] = (uint8_t)(xs() & 0xff);
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memset(dst, 0, sizeof(dst));
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memset(dst_ref, 0, sizeof(dst_ref));
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for (int i = 0; i < N; i++) {
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meta[i].src_off = (uint32_t)(i * TILE_BYTES + SRC_COL);
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meta[i].dst_off = (uint32_t)(i * TILE_BYTES + SRC_COL);
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}
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for (int i = 0; i < N; i++)
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daedalus_put_h264_qpel8_mc20_ref(dst_ref + meta[i].dst_off,
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src + meta[i].src_off,
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TILE_STRIDE);
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int rc = daedalus_recipe_dispatch_h264_qpel_mc20(ctx, dst, src,
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TILE_STRIDE, N, meta);
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if (rc) { fprintf(stderr, "qpel_mc20 dispatch rc=%d\n", rc); return 1; }
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int diff = 0;
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for (int i = 0; i < TOTAL; i++) if (dst[i] != dst_ref[i]) diff++;
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printf(" H.264 qpel mc20: %d/%d bytes bit-exact (%.4f%%)\n",
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TOTAL - diff, TOTAL, 100.0 * (TOTAL - diff) / TOTAL);
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daedalus_ctx_destroy(ctx);
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return diff == 0 ? 0 : 1;
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}
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int main(void)
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{
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printf("=== Phase 8a API smoke: H.264 kernels via recipe dispatch ===\n");
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printf(" H264_IDCT4 recipe substrate: %d (1=CPU, 2=QPU)\n",
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(int) daedalus_recipe_substrate_for(DAEDALUS_KERNEL_H264_IDCT4));
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printf(" H264_IDCT8 recipe substrate: %d\n",
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(int) daedalus_recipe_substrate_for(DAEDALUS_KERNEL_H264_IDCT8));
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printf(" H264_DEBLOCK_LV recipe substrate: %d\n",
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(int) daedalus_recipe_substrate_for(DAEDALUS_KERNEL_H264_DEBLOCK_LV));
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printf(" H264_QPEL_MC20 recipe substrate: %d\n",
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(int) daedalus_recipe_substrate_for(DAEDALUS_KERNEL_H264_QPEL_MC20));
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printf(" H264_DEBLOCK_LH recipe substrate: %d (CPU, no QPU H shader yet)\n",
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(int) daedalus_recipe_substrate_for(DAEDALUS_KERNEL_H264_DEBLOCK_LH));
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int fail = 0;
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fail |= test_idct4();
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fail |= test_idct8();
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fail |= test_deblock();
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fail |= test_deblock_h();
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fail |= test_qpel_mc20();
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return fail;
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}
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