 marfrit
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a18ba53d6b
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iter11 Phase 3 + 4: HEVC SPS wire-byte diff narrows Bug 5 to α-13
Phase 3 deep strace: only meaningful SPS diff is bytes 10-11.
libva bytes 10-11 = 00 00 (sps_max_num_reorder_pics=0, latency=0)
kdirect bytes 10-11 = 02 04 (reorder=2, latency=4)
Hardcoded at h265.c:110-111 with comment "/* not exposed */". VAAPI's
VAPictureParameterBufferHEVC doesn't forward these; kdirect parses
SPS NAL directly. sps_max_num_reorder_pics = 0 tells rkvdec "no
reordering" -> B-frame decode blocked -> all-zero output (Bug 5 fits).
Secondary diffs (Phase 4b candidates if α-13 doesn't close):
- SLICE_PARAMS num_entry_point_offsets = 0 (hardcoded at h265.c:356
with "iter2 doesn't do tiles" comment); kdirect submits 22.
- PPS UNIFORM_SPACING flag bit 20 (don't-care for non-tiled).
Phase 4 α-13: ~2 LOC fix. Set sps_max_num_reorder_pics =
sps_max_dec_pic_buffering_minus1 (safe upper bound per H.265 §A.4.2).
Leave sps_max_latency_increase_plus1 = 0 (spec "unconstrained").
Phase 5b review required before Phase 6b implementation per
"reviews never skippable".
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-05-14 01:58:03 +00:00 |
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