α-17 implemented and deployed. strace confirms VIDIOC_EXPBUF +
DMA_BUF_IOCTL_SYNC(START|READ) before memcpy + END after, all returning 0.
The libva backend now follows the V4L2+dma-buf cache-sync contract
correctly. But 5-codec sweep hashes are byte-identical to anchors:
no Bug 4/5 movement.
Cache-sync hypothesis empirically falsified. Bug 4 + 5 are NOT a CPU
cache-coherency issue on the libva cached-mmap path.
Three consecutive PARTIAL closes (iter11 wire-byte, iter12 RFC v2,
iter13 cache-sync) confirms libva-backend-side hypothesis space for
Bug 4+5 is exhausted. The live source is kernel-side write-
completeness for HEVC and H.264 on RK3399 rkvdec — distinct from
cache visibility (γ dump iter8 already confirmed destination_data[]
post-DQBUF matches YUV output).
Backend SHA on fresnel: 9ba47002...
iter14 candidates:
α-16: OUTPUT byte dump (cheapest remaining)
kernel-side rkvdec audit (deepest; route via kernel-agent)
pivot to Bug 6 VP8 or campaign close-out documentation
α-17 itself is real wire-correctness progress even as a non-fix.
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
