From 1d805ef70d52b5441a02ef6a28e49077f47aa6fb Mon Sep 17 00:00:00 2001 From: "Claude (noether)" Date: Sat, 16 May 2026 06:02:28 +0000 Subject: [PATCH] fleet/ampere: extend baseline with lid+USB-C PD+speaker (all 6 patches verified) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit After verifying the minimal v7.0-rc3+pwm15+pwm-fan+RK806 baseline boots with display on ampere, extended via bisect-by-addition to include 3 more from linux-rk3588-marfrit's pre-cherry-pick set: 0004 enable speaker output (genbook dts + cm5 dtsi) 0005 USB-C PD charging (genbook dts: FUSB302, vcc5v0_otg) 0006 lid switch + USB3 lane mux (genbook dts: gpio-keys SW_LID, usbdp_phy1) ampere-minimal-devices branch on git.reauktion.de/marfrit/linux-rk3588-marfrit @ 7c241f2e2835 = the verified-working state with all 6 patches. Display continues to work — confirms regression source is in one of the 12 remaining linux-rk3588-marfrit commits (Shawn Lin pcie3 phy series, Cristian Ciocaltea clk/dts/dw-dp, Sebastian Reichel hdmirx, Pedro Alves btrtl, plus the WIP suspend/resume patch 0010). Generated-by: Claude Opus 4.7 --- fleet/ampere.yaml | 13 +- ...ip-rk3588-coolpi-cm5-genbook-enable-.patch | 114 +++++++++ ...ip-rk3588-coolpi-cm5-genbook-add-USB.patch | 236 ++++++++++++++++++ ...ip-rk3588-coolpi-cm5-genbook-add-lid.patch | 100 ++++++++ 4 files changed, 459 insertions(+), 4 deletions(-) create mode 100644 patches/board/coolpi-genbook/0004-arm64-dts-rockchip-rk3588-coolpi-cm5-genbook-enable-.patch create mode 100644 patches/board/coolpi-genbook/0005-arm64-dts-rockchip-rk3588-coolpi-cm5-genbook-add-USB.patch create mode 100644 patches/board/coolpi-genbook/0006-arm64-dts-rockchip-rk3588-coolpi-cm5-genbook-add-lid.patch diff --git a/fleet/ampere.yaml b/fleet/ampere.yaml index 7050096..0b64d7f 100644 --- a/fleet/ampere.yaml +++ b/fleet/ampere.yaml @@ -39,14 +39,19 @@ includes: - board/coolpi-genbook/0001-arm64-dts-rockchip-rk3588-Add-pwm15-pinctrl-entries.patch - board/coolpi-genbook/0002-arm64-dts-rockchip-rk3588-coolpi-cm5-genbook-Add-pwm.patch - board/coolpi-genbook/0003-arm64-dts-rockchip-rk3588-coolpi-cm5-fix-power-off-b.patch + - board/coolpi-genbook/0004-arm64-dts-rockchip-rk3588-coolpi-cm5-genbook-enable-.patch + - board/coolpi-genbook/0005-arm64-dts-rockchip-rk3588-coolpi-cm5-genbook-add-USB.patch + - board/coolpi-genbook/0006-arm64-dts-rockchip-rk3588-coolpi-cm5-genbook-add-lid.patch # Explicitly NOT included (decision logged): # - misc_patches/genbook/kernel/0010 (sleep fixes / WIP — re-evaluate # once Markus closes the suspend/resume thread) -# - lid switch / USB-C PD / speaker / Shawn Lin pcie3 phy series / -# Collabora clk/dts/dw-dp fixes / Sebastian Reichel hdmirx -# (all currently suspect for black-screen regression; re-bisect -# individually before re-adding) +# - 12 other linux-rk3588-marfrit commits (Shawn Lin pcie3 phy series, +# Cristian Ciocaltea clk/dts/dw-dp fixes, Sebastian Reichel hdmirx +# Rock 5 ITX, Pedro Alves btrtl). Top regression suspect: +# 55d1b3dcc05e "clk: rockchip: rk3588: Drop CLK_SET_RATE_PARENT from +# DCLK_VOP2_SRC" — touches display controller clock. Bisect campaign +# separately to identify the actual offender(s). config: source: /proc/config.gz on running ampere kernel (7.0.0-rc3-ARCH+) diff --git a/patches/board/coolpi-genbook/0004-arm64-dts-rockchip-rk3588-coolpi-cm5-genbook-enable-.patch b/patches/board/coolpi-genbook/0004-arm64-dts-rockchip-rk3588-coolpi-cm5-genbook-enable-.patch new file mode 100644 index 0000000..72bd8a9 --- /dev/null +++ b/patches/board/coolpi-genbook/0004-arm64-dts-rockchip-rk3588-coolpi-cm5-genbook-enable-.patch @@ -0,0 +1,114 @@ +From 3722eabbf2d28b1ea35add3e7b36d52e4bbd63c3 Mon Sep 17 00:00:00 2001 +From: Markus Fritsche +Date: Thu, 16 Apr 2026 23:52:54 +0200 +Subject: [PATCH 4/6] arm64: dts: rockchip: rk3588-coolpi-cm5-genbook: enable + speaker output + +The GenBook carrier board routes the ES8316 HPOL/HPOR outputs to both a +headphone jack and an external speaker amplifier. The amplifier is +enabled by GPIO1_A6 (active-high) and headphone insertion is detected by +GPIO1_B5 (active-high, pull-up). + +Add a label to the shared analog-sound node in the CM5 DTSI so the +GenBook DTS can extend it, then override the node to: + + - add pa-gpios for the speaker amplifier enable line (GPIO1_A6) + - add hp-det-gpios for headphone jack detection (GPIO1_B5) + - extend widgets/routing to include the Speaker path through the + audio-graph-card built-in "Amplifier" DAPM output-driver widget, + which gates the pa-gpios GPIO on widget power-up/down + - add the hp-det pinctrl group for GPIO1_B5 + +The "Amplifier" DAPM widget (snd_soc_dapm_out_drv) is provided by +audio-graph-card.c and registered at card level. Its event handler +drives pa-gpios high on SND_SOC_DAPM_POST_PMU and low on +SND_SOC_DAPM_PRE_PMD, giving automatic speaker enable/disable in step +with DAPM power management. + +DAPM path for speaker output: + ES8316 AIF1RX (DAI) -> Left/Right DAC -> Left/Right Headphone Mixer + -> Left/Right Headphone Driver -> HPOL/HPOR [codec OUTPUT pins] + -> Amplifier [card OUT_DRV, fires pa-gpios] -> Speaker [SPK terminal] + +The Left/Right Headphone Mixer Left/Right DAC Switch controls, which +gate the DAC-to-mixer connections in the DAPM graph, are set on by the +UCM BootSequence in the rk3588-es8316 ALSA UCM profile and must remain +enabled for the path to be traversable. + +The HPOL/HPOR codec output pins also feed the Headphones HP widget: + + HPOL/HPOR -> Headphones [HP terminal, jack-controlled via hp-det-gpios] + +Both the Speaker and Headphones paths are active whenever a PCM stream +is running. Speaker-muting when headphones are inserted is handled at +the userspace (UCM) level via JackHWMute on the Speaker UCM device: when +PipeWire routes audio away from the Speaker sink on headphone insertion, +the absence of an active PCM consumer causes DAPM to power down the +Amplifier widget and drive GPIO1_A6 low. + +Note: full speaker output also requires a Speaker SectionDevice in the +rk3588-es8316 ALSA UCM HiFi.conf. Without it the HiFi profile's only +playback port is Headphones (jack-controlled), causing the profile to be +reported as "not available" when no headphones are inserted, and +PipeWire falls back to the pro-audio profile with no speaker sub-device. +A separate patch to alsa-ucm-conf adds the missing Speaker device. + +Generated-by: Claude Sonnet 4.6 +Signed-off-by: Markus Fritsche +--- + .../rockchip/rk3588-coolpi-cm5-genbook.dts | 24 +++++++++++++++++++ + .../boot/dts/rockchip/rk3588-coolpi-cm5.dtsi | 2 +- + 2 files changed, 25 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts +index 9819ac482855..070f5dde715c 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts +@@ -283,7 +283,31 @@ &pcie3x4 { + status = "okay"; + }; + ++&analog_sound { ++ pa-gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; ++ hp-det-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hp_det>; ++ ++ widgets = "Microphone", "Mic Jack", ++ "Headphone", "Headphones", ++ "Speaker", "Speaker"; ++ ++ routing = "MIC2", "Mic Jack", ++ "Headphones", "HPOL", ++ "Headphones", "HPOR", ++ "Amplifier", "HPOL", ++ "Amplifier", "HPOR", ++ "Speaker", "Amplifier"; ++}; ++ + &pinctrl { ++ headphone { ++ hp_det: hp-det { ++ rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ + lcd { + lcdpwr_en: lcdpwr-en { + rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>; +diff --git a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi +index 83b72ec95f5a..582c3717192f 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi +@@ -21,7 +21,7 @@ aliases { + serial2 = &uart2; + }; + +- analog-sound { ++ analog_sound: analog-sound { + compatible = "audio-graph-card"; + dais = <&i2s0_8ch_p0>; + label = "rk3588-es8316"; +-- +2.54.0 + diff --git a/patches/board/coolpi-genbook/0005-arm64-dts-rockchip-rk3588-coolpi-cm5-genbook-add-USB.patch b/patches/board/coolpi-genbook/0005-arm64-dts-rockchip-rk3588-coolpi-cm5-genbook-add-USB.patch new file mode 100644 index 0000000..046a446 --- /dev/null +++ b/patches/board/coolpi-genbook/0005-arm64-dts-rockchip-rk3588-coolpi-cm5-genbook-add-USB.patch @@ -0,0 +1,236 @@ +From 3e42ab69173dc33ffc07307a5ae2f83153d6894d Mon Sep 17 00:00:00 2001 +From: Markus Fritsche +Date: Tue, 24 Mar 2026 00:00:00 +0000 +Subject: [PATCH 5/6] arm64: dts: rockchip: rk3588-coolpi-cm5-genbook: add + USB-C PD charging +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The GenBook carrier board exposes a USB Type-C port driven by the +RK3588 USB3OTG0 controller (usb_host0_xhci / usbdp_phy0 combo). The +port uses a Fairchild FUSB302 (I²C address 0x22, bus i2c4) for USB +Power Delivery negotiation. Hardware signals: + + GPIO0_PD5 – FUSB302 interrupt (active-low, shared with CC logic) + GPIO0_PA0 – VBUS switch enable (active-high) + +Without these changes the kernel registers usb_host0_xhci in +peripheral-only, high-speed mode, which prevents PD negotiation and +leaves the port unable to charge the battery. + +Changes: + +* Add #include for PDO_FIXED macros. + +* Add vcc5v0_otg regulator: GPIO0_PA0 active-high switch that gates + VBUS; used as vbus-supply for the FUSB302 and connected via the new + typec5v_pwren pinctrl entry. The previously defined but unreferenced + usb_otg_pwren entry (same pin, wrong pull direction) is removed. + +* Add usbc0 (FUSB302) node inside &i2c4: + - compatible "fcs,fusb302", reg 0x22 + - interrupt GPIO0_PD5 (IRQ_TYPE_LEVEL_LOW), pinctrl usbc0_int + - usb-c-connector child with: + data-role / power-role "dual", try-power-role "sink" + pd-revision 2.0 Ver 1.2 (maximum supported by FUSB302) + sink-pdos: 5 V/3 A, 9 V/3 A, 12 V/3 A, 15 V/3 A + source-pdos: 5 V/3 A + DisplayPort alt-mode (SVID 0xff01) declared for orientation + switching; three connector ports linking HS (→ usb_host0_xhci), + SS (→ usbdp_phy0) and SBU (→ usbdp_phy0) endpoints. + +* Expand &usbdp_phy0 to add mode-switch and orientation-switch + capabilities; register endpoint@0 (SS, linked to usbc0_ss) and + endpoint@1 (SBU, linked to usbc0_sbu). + +* Replace the &usb_host0_xhci override: + - remove dr_mode "peripheral" and maximum-speed "high-speed" + (the base DTSI already sets dr_mode "otg") + - add usb-role-switch and the port endpoint linked to usbc0_hs + This allows the TCPM stack to switch the controller between host + and device role as the PD contract dictates. + +* Add pinctrl group usb-typec with: + - usbc0_int: GPIO0_PD5 pull-up (FUSB302 /INT) + - typec5v_pwren: GPIO0_PA0 pull-down (VBUS switch, default off) + +DAPM / power flow: + USB-C charger → FUSB302 CC negotiation → TCPM requests VBUS → + vcc5v0_otg regulator enables GPIO0_PA0 → VBUS present on port → + DWC3 OTG detects VBUS, enters device/host mode per PD data-role. + +Generated-by: Claude Sonnet 4.6 +Signed-off-by: Markus Fritsche +--- + .../rockchip/rk3588-coolpi-cm5-genbook.dts | 112 +++++++++++++++++- + 1 file changed, 106 insertions(+), 6 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts +index 070f5dde715c..7c577a603cb5 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts +@@ -8,6 +8,7 @@ + + #include + #include ++#include + #include "rk3588-coolpi-cm5.dtsi" + + / { +@@ -153,6 +154,18 @@ vcc5v0_usb_host0: vcc5v0_usb30_host: regulator-vcc5v0-usb-host { + pinctrl-0 = <&usb_host_pwren>; + vin-supply = <&vcc5v0_usb>; + }; ++ ++ vcc5v0_otg: regulator-vcc5v0-otg { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_otg"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&typec5v_pwren>; ++ vin-supply = <&vcc5v0_sys>; ++ }; + }; + + &edp1 { +@@ -239,6 +252,65 @@ cw2015@62 { + monitored-battery = <&battery>; + power-supplies = <&charger>; + }; ++ ++ usbc0: usb-typec@22 { ++ compatible = "fcs,fusb302"; ++ reg = <0x22>; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usbc0_int>; ++ vbus-supply = <&vcc5v0_otg>; ++ ++ usb_con: connector { ++ compatible = "usb-c-connector"; ++ label = "USB-C"; ++ data-role = "dual"; ++ power-role = "dual"; ++ try-power-role = "sink"; ++ op-sink-microwatt = <1000000>; ++ /* FUSB302 supports PD Rev 2.0 Ver 1.2 */ ++ pd-revision = /bits/ 8 <0x2 0x0 0x1 0x2>; ++ sink-pdos = , ++ , ++ , ++ ; ++ source-pdos = ; ++ ++ altmodes { ++ displayport { ++ svid = /bits/ 16 <0xff01>; ++ vdo = <0xffffffff>; ++ }; ++ }; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ usbc0_hs: endpoint { ++ remote-endpoint = <&usb_host0_xhci_to_usbc0>; ++ }; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ usbc0_ss: endpoint { ++ remote-endpoint = <&usbdp_phy0_ss>; ++ }; ++ }; ++ ++ port@2 { ++ reg = <2>; ++ usbc0_sbu: endpoint { ++ remote-endpoint = <&usbdp_phy0_sbu>; ++ }; ++ }; ++ }; ++ }; ++ }; + }; + + &i2c5 { +@@ -323,15 +395,21 @@ usb_pwren: usb-pwren { + rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + +- usb_otg_pwren: usb-otg-pwren { +- rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; +- }; +- + usb_host_pwren: usb-host-pwren { + rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + ++ usb-typec { ++ usbc0_int: usbc0-int { ++ rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ typec5v_pwren: typec5v-pwren { ++ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ + wifi { + bt_pwron: bt-pwron { + rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; +@@ -387,7 +465,24 @@ &u2phy0_otg { + }; + + &usbdp_phy0 { ++ mode-switch; ++ orientation-switch; + status = "okay"; ++ ++ port { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ usbdp_phy0_ss: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&usbc0_ss>; ++ }; ++ ++ usbdp_phy0_sbu: endpoint@1 { ++ reg = <1>; ++ remote-endpoint = <&usbc0_sbu>; ++ }; ++ }; + }; + + &u2phy1 { +@@ -431,9 +526,14 @@ &usb_host0_ohci { + + /* Type C port */ + &usb_host0_xhci { +- dr_mode = "peripheral"; +- maximum-speed = "high-speed"; ++ usb-role-switch; + status = "okay"; ++ ++ port { ++ usb_host0_xhci_to_usbc0: endpoint { ++ remote-endpoint = <&usbc0_hs>; ++ }; ++ }; + }; + + /* connected to a HUB for camera and BT */ +-- +2.54.0 + diff --git a/patches/board/coolpi-genbook/0006-arm64-dts-rockchip-rk3588-coolpi-cm5-genbook-add-lid.patch b/patches/board/coolpi-genbook/0006-arm64-dts-rockchip-rk3588-coolpi-cm5-genbook-add-lid.patch new file mode 100644 index 0000000..220df03 --- /dev/null +++ b/patches/board/coolpi-genbook/0006-arm64-dts-rockchip-rk3588-coolpi-cm5-genbook-add-lid.patch @@ -0,0 +1,100 @@ +From 7c241f2e28353aa2256682993d2546b96883ae27 Mon Sep 17 00:00:00 2001 +From: Markus Fritsche +Date: Tue, 24 Mar 2026 00:00:00 +0000 +Subject: [PATCH 6/6] arm64: dts: rockchip: rk3588-coolpi-cm5-genbook: add lid + switch and USB3 PHY lane config + +The GenBook laptop has two features missing from the mainline DTS: + +1. Lid switch (MH248 hall-effect sensor on GPIO0_PB0) + The lid state is reported via a gpio-keys node using SW_LID / EV_SW. + The GPIO is active-low (low = lid closed) and pulled up. + wakeup-source is set so that opening the lid can wake the system from + suspend. A sensor pinctrl group is added for the GPIO configuration. + +2. usbdp_phy1 lane mux (rockchip,dp-lane-mux = <2 3>) + The RK3588 usbdp_phy1 is a combo USB3 + DisplayPort PHY shared between + the USB3 host1 port (USB-A connector) and the DisplayPort output on the + GenBook board. Lanes 0+1 carry USB3 SuperSpeed to the USB-A socket; + lanes 2+3 are routed to the DP connector. + + Without this property the phy-rockchip-usbdp driver selects + UDPHY_MODE_USB and configures all four lanes as USB3. That conflicts + with the physical routing on this board: lanes 2+3 are not connected to + the USB-A socket, so the 4-lane USB3 training fails silently and the + USB3 host1 DWC3 controller (usb_host1_xhci) cannot enumerate devices. + + Setting rockchip,dp-lane-mux = <2 3> restricts USB3 to lanes 0+1, + matching the physical wiring, and enables correct SuperSpeed operation + on the USB-A port. + + The USB2 EHCI host1 controller (usb_host1_ehci) shares the USB power + domain with usb_host1_xhci. A stalled USB3 DWC3 probe can delay + power-domain activation in a way that prevents the EHCI hub (which + carries the integrated webcam) from being enumerated. With the correct + lane mux both controllers probe cleanly and the webcam is detected. + +Generated-by: Claude Sonnet 4.6 +Signed-off-by: Markus Fritsche +--- + .../rockchip/rk3588-coolpi-cm5-genbook.dts | 23 +++++++++++++++++++ + 1 file changed, 23 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts +index 7c577a603cb5..e3954851b0cb 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts +@@ -8,6 +8,7 @@ + + #include + #include ++#include + #include + #include "rk3588-coolpi-cm5.dtsi" + +@@ -166,6 +167,21 @@ vcc5v0_otg: regulator-vcc5v0-otg { + pinctrl-0 = <&typec5v_pwren>; + vin-supply = <&vcc5v0_sys>; + }; ++ ++ gpio-key-lid { ++ compatible = "gpio-keys"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mh248_irq_gpio>; ++ ++ lid { ++ debounce-interval = <20>; ++ gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>; ++ label = "Lid"; ++ linux,code = ; ++ linux,input-type = ; ++ wakeup-source; ++ }; ++ }; + }; + + &edp1 { +@@ -431,6 +447,12 @@ pcie_wake: pcie-wake { + rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; ++ ++ sensor { ++ mh248_irq_gpio: mh248-irq-gpio { ++ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; + }; + + &pwm6 { +@@ -512,6 +534,7 @@ &u2phy3_host { + }; + + &usbdp_phy1 { ++ rockchip,dp-lane-mux = <2 3>; + status = "okay"; + }; + +-- +2.54.0 +