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libva-multiplanar/phase0_evidence/2026-05-04-kernel-trace/dmesg.txt
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marfrit 365764fffb Phase 0 amendment: hantro writes zeros, sentinel test cache-buggy 
Re-baselined libva-v4l2-request decode path with kernel-side
observability (ftrace v4l2/vb2/dma_fence + dmesg + dynamic_debug)
and visual disambiguator (mpv --vo=gpu in operator's live Plasma
session).

Findings:

1. Kernel reports successful CAPTURE buffer write every frame:
   ftrace vb2_buf_done shows bytesused=3655712 (full NV12 1920x1088
   + hantro tile padding). dmesg completely silent — no
   hantro/vpu/decode/error/warn messages.

2. Visual disambiguator: mpv --hwdec=vaapi-copy --vo=gpu shows a
   solid GREEN frame; --hwdec=vaapi --vo=gpu shows solid BLUE.
   Neither shows the sentinel mid-beige (NV12 Y=0xab,UV=0xab would
   render cream). Both colors are consistent with the kernel
   writing all-zero NV12 (Y=0,UV=0 → green via BT.709 limited; same
   buffer GL-imported as DMA-BUF with different colorspace → blue).

3. Patch 0011 sentinel test has a cache-coherency bug: writes
   0xab via cached surface_object->destination_map[0] mmap, never
   invalidates cache before readback. So the readback always
   shows the stale sentinel even when kernel DMA-overwrote it
   with zeros. vaapi-copy and Mesa DMA-BUF GL import correctly
   invalidate cache and see the real (zero) contents.

This corrects the previous Phase 0 verdicts twice in one day:
- Original commit f15ba8b ("the 2026-04-26 picture holds") was
  wrong: clean contract trace, never checked pixel content.
- Revised commit e892cea ("kernel produces no decoded pixel
  output, sentinel survives") was half right: kernel does write,
  writes zeros, and the sentinel test was reading stale cache.
- Now: kernel writes ALL ZEROS to the CAPTURE buffer. Hantro is
  silently failing the bitstream parse or some control validation.

This is consistent with patch 0011's own commit message hypothesis:
"All zeros → kernel did write 0x00s (overwriting our sentinel),
and the apparent 'no picture' output is the kernel-side decode
actually producing zeros (e.g. parser rejected the bitstream)."
That hypothesis was right; we just couldn't confirm it via the
sentinel test (cache bug) and went down the wrong rabbit hole.

Phase 6 direction sharpens substantially. Bug isn't "we can't
engage hantro" — it's "hantro engages but its parser produces
zeros." Bisect the control submission: VIDIOC_G_EXT_CTRLS
readback to verify writes stick, diff against FFmpeg's
v4l2_request_h264.c (proven working on hantro), verify SPS
completeness, resolve patch 0008's slice_header bit_size open
question, dyndbg the hantro module, etc. Phase 1 boolean-
correctness criterion needs a working pixel-content check before
lock; fix patch 0011's cache sync first.

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
2026-05-04 11:39:42 +00:00

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[164409.369147] vb2_common_vm_open: 000000006fee19be, refcount: 1, vma: ffff74093000-ffff74410000
[164409.369176] vb2_dc_mmap: mapped dma addr 0xffc00000 at 0xffff74093000, size 3657728
[164409.393936] vb2_common_vm_open: 00000000cd1dc2b0, refcount: 1, vma: ffff6cea0000-ffff6cfa0000
[164409.393966] vb2_dc_mmap: mapped dma addr 0xffb00000 at 0xffff6cea0000, size 1048576
[164409.394135] vb2_common_vm_open: 00000000d8648f35, refcount: 1, vma: ffff6cda0000-ffff6cea0000
[164409.394145] vb2_dc_mmap: mapped dma addr 0xffa00000 at 0xffff6cda0000, size 1048576
[164409.394289] vb2_common_vm_open: 000000002dc1a0f9, refcount: 1, vma: ffff6cca0000-ffff6cda0000
[164409.394298] vb2_dc_mmap: mapped dma addr 0xff900000 at 0xffff6cca0000, size 1048576
[164409.394418] vb2_common_vm_open: 00000000105d46cc, refcount: 1, vma: ffff6c2f0000-ffff6c3f0000
[164409.394427] vb2_dc_mmap: mapped dma addr 0xff800000 at 0xffff6c2f0000, size 1048576
[164409.396063] ref_pic_list_p (cur_poc 0f) |
[164409.396089] ref_pic_list_b0 (cur_poc 0f) |
[164409.396095] ref_pic_list_b1 (cur_poc 0f) |
[164409.400272] vb2_common_vm_open: 00000000ee441ba9, refcount: 1, vma: ffff50c23000-ffff50fa0000
[164409.400303] vb2_dc_mmap: mapped dma addr 0xff400000 at 0xffff50c23000, size 3657728
[164409.402342] ref_pic_list_p (cur_poc 4f) |0sf|
[164409.402371] ref_pic_list_b0 (cur_poc 4f) |0sf|
[164409.402377] ref_pic_list_b1 (cur_poc 4f) |0sf|
[164409.406415] vb2_common_vm_open: 0000000047100871, refcount: 1, vma: ffff508a6000-ffff50c23000
[164409.406445] vb2_dc_mmap: mapped dma addr 0xff000000 at 0xffff508a6000, size 3657728
[164409.408371] ref_pic_list_p (cur_poc 2f) |1sf|0sf|
[164409.408401] ref_pic_list_b0 (cur_poc 2f) |0sf|4sf|
[164409.408407] ref_pic_list_b1 (cur_poc 2f) |4sf|0sf|
[164409.413010] vb2_common_vm_open: 00000000bbb580d1, refcount: 1, vma: ffff50529000-ffff508a6000
[164409.413039] vb2_dc_mmap: mapped dma addr 0xfec00000 at 0xffff50529000, size 3657728
[164409.415279] ref_pic_list_p (cur_poc 8f) |1sf|0sf|
[164409.415303] ref_pic_list_b0 (cur_poc 8f) |4sf|0sf|
[164409.415309] ref_pic_list_b1 (cur_poc 8f) |0sf|4sf|
[164409.418795] vb2_common_vm_open: 00000000e1700fb9, refcount: 1, vma: ffff501ac000-ffff50529000
[164409.418823] vb2_dc_mmap: mapped dma addr 0xfe800000 at 0xffff501ac000, size 3657728
[164409.420609] ref_pic_list_p (cur_poc 6f) |2sf|1sf|
[164409.420631] ref_pic_list_b0 (cur_poc 6f) |4sf|8sf|
[164409.420636] ref_pic_list_b1 (cur_poc 6f) |8sf|4sf|
[164409.424805] vb2_common_vm_open: 00000000db68d9b2, refcount: 1, vma: ffff33c83000-ffff34000000
[164409.424835] vb2_dc_mmap: mapped dma addr 0xfe400000 at 0xffff33c83000, size 3657728
[164409.427075] ref_pic_list_p (cur_poc 12f) |2sf|1sf|
[164409.427101] ref_pic_list_b0 (cur_poc 12f) |8sf|4sf|
[164409.427107] ref_pic_list_b1 (cur_poc 12f) |4sf|8sf|
[164409.431562] vb2_common_vm_open: 00000000fb4ad050, refcount: 1, vma: ffff33906000-ffff33c83000
[164409.431593] vb2_dc_mmap: mapped dma addr 0xfe000000 at 0xffff33906000, size 3657728
[164409.432292] ref_pic_list_p (cur_poc 10f) |3sf|2sf|
[164409.432316] ref_pic_list_b0 (cur_poc 10f) |8sf|12sf|
[164409.432322] ref_pic_list_b1 (cur_poc 10f) |12sf|8sf|
[164409.458338] ref_pic_list_p (cur_poc 16f) |3sf|2sf|
[164409.458365] ref_pic_list_b0 (cur_poc 16f) |12sf|8sf|
[164409.458372] ref_pic_list_b1 (cur_poc 16f) |8sf|12sf|
[164409.483681] ref_pic_list_p (cur_poc 14f) |4sf|3sf|
[164409.483708] ref_pic_list_b0 (cur_poc 14f) |12sf|16sf|
[164409.483714] ref_pic_list_b1 (cur_poc 14f) |16sf|12sf|
[164409.508649] ref_pic_list_p (cur_poc 20f) |4sf|3sf|
[164409.508676] ref_pic_list_b0 (cur_poc 20f) |16sf|12sf|
[164409.508682] ref_pic_list_b1 (cur_poc 20f) |12sf|16sf|
[164409.531008] vb2_common_vm_close: 000000006fee19be, refcount: 1, vma: ffff74093000-ffff74410000
[164409.532091] vb2_common_vm_close: 00000000bbb580d1, refcount: 1, vma: ffff50529000-ffff508a6000
[164409.533000] vb2_common_vm_close: 00000000db68d9b2, refcount: 1, vma: ffff33c83000-ffff34000000
[164409.534029] vb2_common_vm_close: 00000000fb4ad050, refcount: 1, vma: ffff33906000-ffff33c83000
[164409.534924] vb2_common_vm_close: 00000000ee441ba9, refcount: 1, vma: ffff50c23000-ffff50fa0000
[164409.535973] vb2_common_vm_close: 0000000047100871, refcount: 1, vma: ffff508a6000-ffff50c23000
[164409.536807] vb2_common_vm_close: 00000000e1700fb9, refcount: 1, vma: ffff501ac000-ffff50529000
[164409.537645] vb2_common_vm_close: 00000000cd1dc2b0, refcount: 1, vma: ffff6cea0000-ffff6cfa0000
[164409.538040] vb2_common_vm_close: 00000000d8648f35, refcount: 1, vma: ffff6cda0000-ffff6cea0000
[164409.538299] vb2_common_vm_close: 000000002dc1a0f9, refcount: 1, vma: ffff6cca0000-ffff6cda0000
[164409.538570] vb2_common_vm_close: 00000000105d46cc, refcount: 1, vma: ffff6c2f0000-ffff6c3f0000
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