test0r
c45fea96e3
Compound patch carrying the fork's pre-Step-1 substrate, originally authored by Jernej Škrabec / fourier on top of bootlin'sa3c2476: - src/h264.c + src/picture.c: V4L2_CID_MPEG_VIDEO_H264_* renamed to V4L2_CID_STATELESS_H264_*, struct shapes tracked to mainline (V4L2_CID_STATELESS_H264_DECODE_MODE/_START_CODE added to the passthrough shim). - include/hevc-ctrls.h: redirect shim to <linux/v4l2-controls.h> (kernel-side HEVC controls now live in the canonical UAPI header). - src/meson.build: src/h265.c / src/h265.h commented out — HEVC build path is excluded from this fork (RK3568 hantro G1/G2 has no HEVC, and the kernel-side HEVC controls have a separate rework in flight upstream). - src/tiled_yuv.S: aarch64 stub for tiled_to_planar (assembly source was sunxi-cedrus armv7-only; aarch64 needs a stub to keep the build linking). - include/h264-ctrls.h: removed (dead post-fourier — no source includes it; the passthrough shim's CID aliases live in the kernel header now). Functionally equivalent to the prior fork master commits:c1f5108V4L2_PIX_FMT_H264_SLICE rename4ccbfe9Strip HEVC build pathda9f2a5include/h264-ctrls.h passthrough + CID aliasesfc4bb10src/h264.c track upstream UAPI shape13e9b64src/h264.c drop num_slices field4d14ffbsrc/tiled_yuv.S aarch64 stub1b02c9bsrc/h264.c include utils.h Folded into one commit during 2026-05-04 Step 1 reconciliation (see ../phase0_evidence/2026-05-04/findings.md). Per-patch history of the early fork commits preserved on the pre-step1 branch. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
186 lines
3.7 KiB
ArmAsm
186 lines
3.7 KiB
ArmAsm
/*
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* Copyright (C) 2014 Jens Kuske <jenskuske@gmail.com>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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/*
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* The Sunxi Video Engine outputs buffers in a specific format similar to NV12
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* but with "tiles" of size 32x32. This code converts the data from this tiled
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* format to two NV12 planes.
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*/
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#if defined(__linux__) && defined(__ELF__)
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.section .note.GNU-stack,"",%progbits /* mark stack as non-executable */
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#endif
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#ifdef __arm__
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.text
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.syntax unified
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.arch armv7-a
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.fpu neon
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.thumb
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.macro thumb_function fname
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.global \fname
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#ifdef __ELF__
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.hidden \fname
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.type \fname, %function
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#endif
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.thumb_func
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\fname:
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.endm
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.macro end_function fname
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#ifdef __ELF__
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.size \fname, .-\fname
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#endif
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.endm
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SRC .req r0
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DST .req r1
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PITCH .req r2
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CNT .req r3
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TLINE .req r4
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HEIGHT .req r5
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REST .req r6
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NTILES .req r7
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TMPSRC .req r8
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DST2 .req r9
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TSIZE .req r12
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NEXTLIN .req lr
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thumb_function tiled_to_planar
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push {r4, r5, r6, r7, r8, lr}
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ldr HEIGHT, [sp, #24]
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add NEXTLIN, r3, #31
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lsrs NTILES, r3, #5
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bic NEXTLIN, NEXTLIN, #31
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and REST, r3, #31
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lsl NEXTLIN, NEXTLIN, #5
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subs PITCH, r2, r3
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movs TLINE, #32
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rsb NEXTLIN, NEXTLIN, #32
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mov TSIZE, #1024
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/* y loop */
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1: cbz NTILES, 3f
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mov CNT, NTILES
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/* x loop complete tiles */
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2: pld [SRC, TSIZE]
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vld1.8 {d0 - d3}, [SRC :256], TSIZE
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subs CNT, #1
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vst1.8 {d0 - d3}, [DST]!
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bne 2b
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3: cbnz REST, 4f
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/* fix up dest pointer if pitch != width */
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7: add DST, PITCH
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/* fix up src pointer at end of line */
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subs TLINE, #1
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itee ne
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addne SRC, NEXTLIN
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subeq SRC, #992
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moveq TLINE, #32
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subs HEIGHT, #1
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bne 1b
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pop {r4, r5, r6, r7, r8, pc}
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/* partly copy last tile of line */
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4: mov TMPSRC, SRC
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tst REST, #16
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beq 5f
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vld1.8 {d0 - d1}, [TMPSRC :128]!
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vst1.8 {d0 - d1}, [DST]!
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5: add SRC, TSIZE
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ands CNT, REST, #15
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beq 7b
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6: vld1.8 {d0[0]}, [TMPSRC]!
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subs CNT, #1
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vst1.8 {d0[0]}, [DST]!
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bne 6b
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b 7b
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end_function tiled_to_planar
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thumb_function tiled_deinterleave_to_planar
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push {r4, r5, r6, r7, r8, r9, lr}
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mov DST2, r2
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ldr HEIGHT, [sp, #32]
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ldr r4, [sp, #28]
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add NEXTLIN, r4, #31
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lsrs NTILES, r4, #5
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bic NEXTLIN, NEXTLIN, #31
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ubfx REST, r4, #1, #4
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lsl NEXTLIN, NEXTLIN, #5
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sub PITCH, r3, r4, lsr #1
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movs TLINE, #32
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rsb NEXTLIN, NEXTLIN, #32
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mov TSIZE, #1024
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/* y loop */
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1: cbz NTILES, 3f
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mov CNT, NTILES
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/* x loop complete tiles */
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2: pld [SRC, TSIZE]
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vld2.8 {d0 - d3}, [SRC :256], TSIZE
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subs CNT, #1
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vst1.8 {d0 - d1}, [DST]!
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vst1.8 {d2 - d3}, [DST2]!
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bne 2b
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3: cbnz REST, 4f
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/* fix up dest pointer if pitch != width */
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7: add DST, PITCH
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add DST2, PITCH
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/* fix up src pointer at end of line */
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subs TLINE, #1
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itee ne
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addne SRC, NEXTLIN
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subeq SRC, #992
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moveq TLINE, #32
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subs HEIGHT, #1
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bne 1b
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pop {r4, r5, r6, r7, r8, r9, pc}
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/* partly copy last tile of line */
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4: mov TMPSRC, SRC
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tst REST, #8
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beq 5f
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vld2.8 {d0 - d1}, [TMPSRC :128]!
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vst1.8 {d0}, [DST]!
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vst1.8 {d1}, [DST2]!
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5: add SRC, TSIZE
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ands CNT, REST, #7
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beq 7b
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6: vld2.8 {d0[0], d1[0]}, [TMPSRC]!
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subs CNT, #1
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vst1.8 {d0[0]}, [DST]!
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vst1.8 {d1[0]}, [DST2]!
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bne 6b
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b 7b
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end_function tiled_deinterleave_to_planar
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#endif
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