claude-noether
f61f736380
Fixes the rkvdec_hevc_prepare_hw_st_rps out-of-bounds kernel OOPS that blocked HEVC decode on ampere (RK3588) per marfrit/libva-v4l2-request-fourier#3 and ampere-fourier iter1 close. Mechanism (Phase 5 amendment to issue body): The new EXT_SPS controls are registered as V4L2_CTRL_FLAG_DYNAMIC_ARRAY in vdpu38x_hevc_ctrl_descs (rkvdec.c:279/284) with cfg.dims = { 65 }. The v4l2-ctrl framework init-allocates 1 zeroed element (ctrls-core.c:2116). When num_short_term_ref_pic_sets > 1, rkvdec_hevc_prepare_hw_st_rps (rkvdec-hevc-common.c:393-405) iterates idx 0..N-1 and overruns the 1-element kernel allocation. Submitting an N-element dynamic-array control via S_EXT_CTRLS extends the framework allocation. Userspace fix: - VIDIOC_QUERY_EXT_CTRL probe at first HEVC CreateContext sets driver_data->has_ext_sps_rps (true on VDPU381/383, false on legacy RK3399 — control unregistered there, so fresnel iter38 5/5 + iter39 sub-profile paths are byte-identical to pre-iter2). - When set, h265_set_controls appends EXT_SPS_ST_RPS + _LT_RPS as calloc'd zero arrays, sized by VAAPI's count fields and capped at H.265 §7.4.3.2 spec maxima (ST 64, LT 32). Min 1 (kernel rejects 0). - Free post-S_EXT_CTRLS. Decode correctness scope: VAAPI does NOT expose per-set st_ref_pic_set syntax elements (delta_idx_minus1, delta_rps_sign, etc.) — confirmed in va_dec_hevc.h. All-zero entries give empty inter-pred RPS per set, which is correct for IDR-only streams and incorrect for streams with inter-pred RPS dependence. iter2 acceptance: stop the OOPS. Decode-correctness for inter-RPS content is a known follow-up requiring either bitstream-snoop or SPS-passthrough via a new VAAPI extension. Files: - include/hevc-ctrls.h: #ifndef-guarded fallback definitions for V4L2_CID_STATELESS_HEVC_EXT_SPS_{ST,LT}_RPS + structs (ampere host is on linux-api-headers 6.19-1; the new CIDs land in 7.0). - src/request.h: driver_data->has_ext_sps_rps (persists for driver lifetime; gated solely by HEVC code path so cross-codec leakage impossible). - src/context.c: probe at HEVC CreateContext via v4l2_query_ext_ctrl. - src/h265.c: controls[5] → controls[7]; #include <hevc-ctrls.h> (replaces <linux/v4l2-controls.h>) for forward UAPI compatibility. Compile-tested on boltzmann (aarch64 native, gcc 15.2.1): clean .so, 0 new warnings. Fresnel cross-device safety: legacy RK3399 rkvdec_ctrl table omits the CIDs; probe returns false; new code path never executes. iter39 sub-profile work (commits662f887+8746690) is preserved in-tree; iter2 is a forward-compatible additive change. Refs: marfrit/libva-v4l2-request-fourier#3 ampere-fourier/iter1_close.md HEVC blocker ampere-fourier/iter2_phase0_findings.md Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
43 lines
1.4 KiB
C
43 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Fourier-local override: HEVC controls are upstream since linux-media
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* 6.6+, so defer to the kernel's linux/v4l2-controls.h instead of
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* duplicating the struct definitions (duplication causes redefinition
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* errors on newer linux-api-headers).
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*
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* iter2 (ampere-fourier, 2026-05-17): the new EXT_SPS_ST_RPS / _LT_RPS
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* controls landed in linux-media v8 series (linux-mmind-v7.0 has them)
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* but linux-api-headers <7.0 doesn't. Ship guarded fallback definitions
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* so the backend builds on older Arch hosts. Newer headers no-op these.
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*/
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#ifndef _LIBVA_V4L2_REQUEST_HEVC_CTRLS_H
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#define _LIBVA_V4L2_REQUEST_HEVC_CTRLS_H
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#include <linux/v4l2-controls.h>
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#ifndef V4L2_CID_STATELESS_HEVC_EXT_SPS_ST_RPS
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#define V4L2_CID_STATELESS_HEVC_EXT_SPS_ST_RPS (V4L2_CID_CODEC_STATELESS_BASE + 408)
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#define V4L2_CID_STATELESS_HEVC_EXT_SPS_LT_RPS (V4L2_CID_CODEC_STATELESS_BASE + 409)
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#define V4L2_HEVC_EXT_SPS_ST_RPS_FLAG_INTER_REF_PIC_SET_PRED 0x1
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#define V4L2_HEVC_EXT_SPS_LT_RPS_FLAG_USED_LT 0x1
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struct v4l2_ctrl_hevc_ext_sps_st_rps {
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__u8 delta_idx_minus1;
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__u8 delta_rps_sign;
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__u8 num_negative_pics;
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__u8 num_positive_pics;
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__u32 used_by_curr_pic;
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__u32 use_delta_flag;
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__u16 abs_delta_rps_minus1;
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__u16 delta_poc_s0_minus1[16];
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__u16 delta_poc_s1_minus1[16];
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__u16 flags;
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};
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struct v4l2_ctrl_hevc_ext_sps_lt_rps {
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__u16 lt_ref_pic_poc_lsb_sps;
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__u16 flags;
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};
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#endif /* V4L2_CID_STATELESS_HEVC_EXT_SPS_ST_RPS */
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#endif
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