docs: genericize host references to machine type (Rock 5 ITX+)
Replace the local host name "boltzmann" with the machine type (Rock 5 ITX+, RK3588, 32 GB) throughout so the replication docs read for anyone on the same hardware, not just this fleet. Rename fleet/boltzmann.yaml -> fleet/rock5-itx-plus.yaml.
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@@ -5,8 +5,7 @@ hardware neural network (400 photocells, stepper-motor-tunable analog weights).
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This project lights up the RK3588 NPU on mainline Linux, so the OSS world
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finally owns the silicon-side of inference on that chip.
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**Scope (Phase 1):** small LLM running CPU + NPU mix on `boltzmann` (Rock 5
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ITX+, RK3588, 32 GB DDR4). Backend: `llama.cpp` with a new `rknpu` device that
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**Scope (Phase 1):** small LLM running CPU + NPU mix on the Rock 5 ITX+ (RK3588, 32 GB DDR4). Backend: `llama.cpp` with a new `rknpu` device that
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offloads the heavy GEMM (matmul in attention + FFN) to the NPU's INT8 path
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while leaving dequant / RoPE / softmax / sampling / embedding lookup on the
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A76 NEON cores.
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@@ -35,10 +34,10 @@ point; the open path to it is.
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| # | Phase | Deliverable |
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|---|---|---|
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| 1 | **Substrate** | Audit mainline NPU driver state (Tomeu Vizoso's rknpu / DRM-accel series); `/dev/accel/*` probe on boltzmann; running kernel + module inventory. `docs/npu-mainline-status.md` snapshot. |
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| 1 | **Substrate** | Audit mainline NPU driver state (Tomeu Vizoso's rknpu / DRM-accel series); `/dev/accel/*` probe on the Rock 5 ITX+; running kernel + module inventory. `docs/npu-mainline-status.md` snapshot. |
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| 2 | Formulate | Pick the exact matmul shape that fits the NPU's tile-MAC array. Identify the smallest-possible op-set llama.cpp can offload. |
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| 3 | Analyze | Read the RKNPU2 SDK + Tomeu's rknpu uAPI to learn: register layout, DMA tensor format, INT8 quant scheme. Don't lift code — extract the spec. |
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| 4 | Baseline | llama.cpp pure-CPU tok/s on boltzmann for qwen-1.5B Q4_K_M. Three runs, median. Reproducible bench script in `benchmarks/`. |
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| 4 | Baseline | llama.cpp pure-CPU tok/s on the Rock 5 ITX+ for qwen-1.5B Q4_K_M. Three runs, median. Reproducible bench script in `benchmarks/`. |
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| 5 | Plan | rknpu backend interface design — where it plugs into ggml's compute graph; memory mapping strategy (dmabuf vs userptr); fallback path. |
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| 6 | Review | Janet (ARM/DRM specialist agent) reviews the NPU register-write + DMA fence strategy. Cold-eyes pass. |
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| 7 | Implement | rknpu ggml backend skeleton + first INT8 matmul. Bit-exact against CPU reference (Q4_K dequant + fp32 matmul). |
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@@ -66,7 +65,7 @@ rosenblatt/
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│ ├── npu-probe/ smallest-possible "open device + run trivial matmul" sanity
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│ └── llm-runtime/ llama.cpp fork with rknpu backend
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├── fleet/
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│ └── boltzmann.yaml host manifest (kernel + NPU driver pin, baseline measurement)
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│ └── rock5-itx-plus.yaml host manifest (kernel + NPU driver pin, baseline measurement)
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└── benchmarks/ reproducible bench scripts + recorded results (JSON + plots)
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```
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@@ -74,13 +73,13 @@ rosenblatt/
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## Host
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Primary: **boltzmann** (Rock 5 ITX+, RK3588, 32 GB DDR4-2666, NVMe rootfs).
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Primary: **Rock 5 ITX+** (RK3588, 32 GB DDR4-2666, NVMe rootfs).
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- Already runs mainline ~v7.0 with most peripheral drivers working.
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- Has the Quark UEFI / Neutron kernel stack — NPU is the next missing peripheral.
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- Other RK3588 hosts (`ampere` = CoolPi GenBook) come later for port-validation.
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Why not `ampere`: laptop, intermittent power, in-use for other campaigns.
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Boltzmann is always-on with 32 GB headroom — right substrate for kernel
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The Rock 5 ITX+ is always-on with 32 GB headroom — right substrate for kernel
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hacking with serial-console fallback (when [Quark](https://git.reauktion.de/marfrit/quark) exposes one).
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---
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@@ -109,7 +108,7 @@ We're writing the second half.
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Phase-1 closeout: `docs/phases.md` + `docs/npu-mainline-status.md`.
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Headline: mainline driver name is **`rocket`** (not `rknpu`); it's
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already shipped in boltzmann's kernel as a built module. Phase-2
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already shipped in the Rock 5 ITX+'s kernel as a built module. Phase-2
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unblock is small (DT enable + IOMMU v1.0 mitigation + modprobe),
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not a driver port.
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