// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Rosenblatt: enable all three RK3588 RKNN cores + their IOMMUs.
 *
 * Apply on top of any rk3588 board DT that uses the mainline
 * rk3588-base.dtsi labels. Verified against boltzmann
 * (model "Radxa ROCK 5 ITX", compatible "radxa,rock-5-itx").
 *
 * Pre-conditions before applying on a system with >4 GB RAM
 * (boltzmann has 32 GB):
 *   - The IOMMU v1.0 hazard MUST be mitigated first.
 *     See docs/npu-mainline-status.md "IOMMU v1.0 hazard".
 *     Either boot with `mem=4G`, OR carry the discriminator-compat
 *     patch series (Simon Xue per-device-ops +
 *     Midgy BALON `rockchip,rk3568-iommu-v1`).
 *
 * After applying:
 *   - `modprobe rocket`
 *   - expect `/dev/accel/accel0` (single facade, schedules across cores)
 *   - dmesg: rocket-driven probe per `npu@fdab0000`, `..fdac0000`,
 *     `..fdad0000`
 *
 * Keep the assigned-clock-rate at the rk3588-base.dtsi default of
 * 200 MHz for first-bringup. Lift to 1 GHz (`SCMI_CLK_NPU` max) only
 * after the rocket bringup, IOMMU, and a baseline matmul are
 * verified stable.
 */

/dts-v1/;
/plugin/;

&rknn_core_0 {
	status = "okay";
};

&rknn_mmu_0 {
	status = "okay";
};

&rknn_core_1 {
	status = "okay";
};

&rknn_mmu_1 {
	status = "okay";
};

&rknn_core_2 {
	status = "okay";
};

&rknn_mmu_2 {
	status = "okay";
};