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Codename: Frank Rosenblatt — Mark I Perceptron 1958, the first
hardware neural network. This project lights up the RK3588 NPU on
mainline Linux so the OSS world finally owns the silicon-side of
inference on that chip.
Phase-1 scope: small LLM running CPU + NPU mix on boltzmann (Rock 5
ITX+). Backend: llama.cpp with a new rknpu ggml backend offloading
INT8 GEMM (attention + FFN matmuls) to the NPU's tile-MAC array while
leaving dequant / RoPE / softmax / sampling / embedding on A76 NEON.
Target model: qwen2.5-1.5B-instruct Q4_K_M GGUF.
Scaffold layout: README.md (frame + 9+1-phase plan), TODO.md (rolling
punch-list), docs/{npu-mainline-status,architecture}.md, kernel/ for
DT bindings + driver tweaks, userspace/{npu-probe,llm-runtime}/,
fleet/boltzmann.yaml.
Next: Phase-1 substrate audit — fill the TBDs in docs/npu-mainline-status.md
with the actual state of Tomeu Vizoso's rknpu / DRM-accel work on
the boltzmann-running kernel.
kernel/
Mainline-bound kernel patches: DT bindings, rknpu driver tweaks,
power-domain wiring for boltzmann's rk3588-rock-5-itx-plus.dts.
Empty until Phase 1 audit identifies what's actually missing in mainline.
If Tomeu Vizoso's rknpu series is far enough along to use as-is, this directory may stay nearly empty — we'd just carry a small DT-overlay patch for boltzmann's board file.
If we end up writing a driver from scratch (worst case), the structure will mirror an upstream submission layout:
0001-dt-bindings-npu-add-rockchip-rk3588-npu.patch
0002-arm64-dts-rockchip-rk3588-add-npu-node.patch
0003-arm64-dts-rockchip-rock-5-itx-plus-enable-npu.patch
0004-accel-rknpu-add-rockchip-rk3588-driver.patch
...
Tracking-wise these go through marfrit/kernel-agent as scope
patches/driver/accel/rknpu/, with fleet/boltzmann-rosenblatt.yaml
as the consuming manifest.