Plan subagent (sonnet) reviewed Phase 0-4 with raw artifacts. Four
findings:
1. GstH265SPSEXT data-source gap — REBUT with empirical evidence.
Reviewer confused GstH265SPSEXT (SPS extension params, separate
struct) with GstH265ShortTermRefPicSetExt (RPS-extended struct,
contains the 4 fields they flagged as missing). Both
ShortTermRefPicSet AND ShortTermRefPicSetExt ARE in the vendored
gsth265parser.h. Direct read of fetched header confirmed.
2. Per-fd storage for has_hevc_ext_sps_rps — ADOPT. Mirror iter38
pattern of storing rkvdec + hantro fds separately. Add explicit
driver_kind=='r' gate for human-readable intent.
3. SPS NAL caching strategy — ADOPT, critical. SPS NALs only arrive
at IDR frames; per-frame walk would submit zero-filled RPS for
non-IDR frames and re-OOPS. Parse-and-cache at first IDR, reuse
on subsequent frames.
4. C3 prediction caveat — ADOPT. Anchor SHA per-clip (HEVC HW vs
HEVC SW) not cross-codec; iter1's shared SHA across codecs was
lucky empirical convergence, not guaranteed.
Three Phase 4 amendments applied as appendix to phase4_plan_iter2.md:
- §Step 3 — per-driver-kind probe storage (pair instead of scalar)
- §Step 4 — explicit two-struct mapping table; SPS parse-and-cache
- §Phase 7 predictions C3 — anchor per-clip
Risk register gains risk #6 (SPS absent on non-IDR frames).
Per feedback_review_empirical_over_theoretical: the Finding #1
rebut was done by reading the actual vendored header file content,
not by source-reading the reviewer's argument. Empirical evidence
won, as the memory rule requires.
Plan sound with amendments. Phase 6 can proceed.
Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
marfrit