 marfrit
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a575e37190
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iter2 phase4: concrete implementation plan for Phase 6
5 commits, ~8.7k LOC, 5 existing file mods. Strict order so Phase 7
can bisect if needed:
Step 1: vendor GStreamer parser unchanged @ pinned SHA (does NOT
build yet — that's intentional, this is upstream baseline)
Step 2: GLib-to-libc mechanical adaptation per the 6-row Phase 2
table; no logic changes; build succeeds; parser unused
Step 3: add src/hevc-ctrls/v4l2-hevc-ext-controls.h with verbatim
kernel UAPI defs + runtime VIDIOC_QUERYCTRL probe at context
init; store on driver_data->has_hevc_ext_sps_rps; gates by
kernel-supports AND vdpu381/383 driver-kind
Step 4: wire h265_set_controls — add 2 entries to controls[] after
the existing 5, gated by probe; SPS NAL parsing via the
vendored gst_h265_parser_*; field-by-field map mirrors
GStreamer's fill_ext_sps_rps verbatim
Step 5: build, install, REBOOT (to clear m2m wedge from Phase 3
baseline), smoke-test with 5-frame HEVC decode
Step 6: README documents the 4 vendored LGPL files
Phase 7 C1-C8 predictions explicit + falsifier mapping (F1 -> Phase
0, F2 -> Phase 4 parser bisect, F3 -> Phase 4 per-driver gate audit).
Risk register: 5 risks named, 4 mitigated. Accepted-as-is: the work
is substantial; per operator directive, time/effort budget is
'however long correctness takes.'
Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
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2026-05-16 08:48:48 +00:00 |
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