claude-noether 53df917afb Phase 3 close: first-light FAILED across 6 iterations — HW stalls
Module loads + format enumerates (kernel-side wiring works) but every
VP9 decode attempt stalls the HW: STA_INT=0x23 (IRQ_RAW + TIMEOUT) when
HW timeout enabled; NO IRQ at all when timeout disabled (genuine stall).

6 iterations of register-tuning all failed identically. Hypothesis
space narrowed to 3 structural-level possibilities:

1. Probability buffer format mismatch (legacy struct rkvdec_vp9_probs
   vs BSP hal_vp9d_prob_default format)
2. Missing kernel-side init (cache config, SRAM/QoS, AXI setup that
   BSP mpp_rkvdec2 does but mainline HEVC happens not to need)
3. vdpu381 register layout doesn't fully expose VP9 control surface
   (BSP MPP may rely on mpp_dev_set_reg_offset translations we don't
   replicate)

Recommended next path: Sonnet/Janet architect review BEFORE more
iteration. The 6 single-bit tuning rounds established that no bit-flip
fix is sufficient — structural rethink required.

Sibling-campaign close state (HEVC bit-perfect) recoverable on ampere
via backup at ~/vp9-iter1-backup/rockchip-vdec.ko.sibling-campaign-close
+ depmod cycle.

Phase 0-2.1 work preserved at boltzmann:~/src/linux-rockchip:
vp9-enablement-iter1 (6 commits, 1517 LoC). Format enumeration on
/dev/video1 confirms kernel-side wiring is correct.

Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
2026-05-17 06:14:06 +00:00

ampere-vp9-enablement

Stand-alone port + upstream-targeting work to enable VP9 hardware decode on Rockchip RK3588's rkvdec (vdpu381 register layout).

Status (2026-05-17 ~01:00)

Upstream RK3588 mainline rkvdec (Casanova v7.0 series, landed in Linux 7.0) supports H.264 + HEVC only. VP9 is on Collabora's stated roadmap but no WIP series has been posted to linux-media as of this campaign open. The legacy rkvdec-vp9.c (RK3399 / vdpu341 hardware) is feature-complete at 1042 lines but its register-config logic does not translate directly to vdpu381.

This campaign:

  1. Ports VP9 enablement to vdpu381 register layout (new file rkvdec-vdpu381-vp9.c)
  2. Registers VP9 V4L2 controls in vdpu38x_vp9_ctrl_descs[]
  3. Adds VP9 fmt to vdpu381_coded_fmts[] with the new ops
  4. Verifies bit-perfect HW vs SW decode (per feedback_compare_hw_against_sw_reference)
  5. Proposes upstream via linux-media

Sibling campaign: ampere-kernel-decoders closed at HEVC bit-perfect (kernel-agent#14 + #15 are the prerequisite kernel fixes).

Scope (out of)

  • VP9 on RK3399 (works via legacy rkvdec-vp9.c already in mainline)
  • VP9 on hantro (hantro decoder on RK3588 doesn't expose VP9; this campaign targets rkvdec)
  • AV1 on RK3588 (separate work; AV1 is on hantro fdc70000 already + per Collabora)
  • VP8 (already works via hantro)
  • HEVC (closed in ampere-kernel-decoders)

Process

8-phase loop (per ~/.claude/CLAUDE.md). All commits via claude-noether identity. Patches will be RFC-quality and routed via kernel-agent once ready.

S
Description
VP9 HW decode enablement on RK3588 rkvdec/vdpu381 — upstream-aligned port
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