Merge pull request 'cycle 9: V3D shader for H.264 luma qpel mc20 — closes 9/9 QPU coverage' (#8) from noether/v3d-shader-h264-qpel-mc20 into main
Reviewed-on: #8
This commit was merged in pull request #8.
This commit is contained in:
+13
-1
@@ -306,7 +306,18 @@ if (DAEDALUS_BUILD_VULKAN)
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VERBATIM
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)
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add_custom_target(daedalus_shaders ALL DEPENDS ${NOOP_SPV} ${IDCT8_SPV} ${LPF_SPV} ${MC_SPV} ${LPF8_SPV} ${CDEF_SPV} ${H264DEBLOCK_SPV} ${H264_IDCT4_SPV} ${H264_IDCT8_SPV})
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set(H264_QPEL_MC20_SPV ${CMAKE_BINARY_DIR}/v3d_h264_qpel_mc20.spv)
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add_custom_command(
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OUTPUT ${H264_QPEL_MC20_SPV}
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COMMAND ${GLSLANG_VALIDATOR} -V --target-env vulkan1.3
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-o ${H264_QPEL_MC20_SPV}
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${CMAKE_SOURCE_DIR}/src/v3d_h264_qpel_mc20.comp
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DEPENDS ${CMAKE_SOURCE_DIR}/src/v3d_h264_qpel_mc20.comp
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COMMENT "glslang: v3d_h264_qpel_mc20.comp -> v3d_h264_qpel_mc20.spv"
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VERBATIM
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)
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add_custom_target(daedalus_shaders ALL DEPENDS ${NOOP_SPV} ${IDCT8_SPV} ${LPF_SPV} ${MC_SPV} ${LPF8_SPV} ${CDEF_SPV} ${H264DEBLOCK_SPV} ${H264_IDCT4_SPV} ${H264_IDCT8_SPV} ${H264_QPEL_MC20_SPV})
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# v3d_runner — reusable Vulkan plumbing.
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add_library(v3d_runner STATIC src/v3d_runner.c)
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@@ -436,6 +447,7 @@ if (DAEDALUS_BUILD_VULKAN)
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${H264DEBLOCK_SPV}
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${H264_IDCT4_SPV}
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${H264_IDCT8_SPV}
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${H264_QPEL_MC20_SPV}
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DESTINATION ${CMAKE_INSTALL_DATADIR}/daedalus-fourier/shaders
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)
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endif()
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+115
-3
@@ -44,6 +44,8 @@ struct daedalus_ctx {
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v3d_pipeline h264_idct4_pipe;
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int h264_idct8_pipe_ready;
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v3d_pipeline h264_idct8_pipe;
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int h264_qpel_mc20_pipe_ready;
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v3d_pipeline h264_qpel_mc20_pipe;
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};
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daedalus_ctx *daedalus_ctx_create(void)
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@@ -100,6 +102,7 @@ void daedalus_ctx_destroy(daedalus_ctx *ctx)
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if (ctx->h264deblock_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264deblock_pipe);
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if (ctx->h264_idct4_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_idct4_pipe);
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if (ctx->h264_idct8_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_idct8_pipe);
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if (ctx->h264_qpel_mc20_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc20_pipe);
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v3d_runner_destroy(ctx->runner);
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}
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free(ctx);
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@@ -127,7 +130,7 @@ daedalus_substrate daedalus_recipe_substrate_for(daedalus_kernel k)
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case DAEDALUS_KERNEL_H264_IDCT4: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_idct4.spv */
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case DAEDALUS_KERNEL_H264_IDCT8: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_idct8.spv */
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case DAEDALUS_KERNEL_H264_DEBLOCK_LV: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264deblock.spv */
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case DAEDALUS_KERNEL_H264_QPEL_MC20: return DAEDALUS_SUBSTRATE_CPU; /* TODO task #165 */
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case DAEDALUS_KERNEL_H264_QPEL_MC20: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc20.spv */
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}
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return DAEDALUS_SUBSTRATE_CPU;
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}
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@@ -930,6 +933,107 @@ fail:
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return -1;
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}
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/* -------------------- H.264 qpel mc20 QPU dispatch (cycle 9) --- */
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typedef struct {
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uint32_t n_blocks;
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uint32_t stride_u8;
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uint32_t _pad0;
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uint32_t _pad1;
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} h264_qpel_mc20_pc;
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static int dispatch_h264_qpel_mc20_qpu(daedalus_ctx *ctx,
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uint8_t *dst, const uint8_t *src, size_t stride,
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size_t n_blocks, const daedalus_h264_qpel_meta *meta)
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{
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if (!ctx->h264_qpel_mc20_pipe_ready) {
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if (v3d_runner_create_pipeline(ctx->runner, "v3d_h264_qpel_mc20.spv",
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3, sizeof(h264_qpel_mc20_pc),
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&ctx->h264_qpel_mc20_pipe) != 0)
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return -1;
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ctx->h264_qpel_mc20_pipe_ready = 1;
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}
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/* Compute the smallest contiguous src/dst window that covers
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* every block's read/write footprint.
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*
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* src: filter reads cols (c-2)..(c+3) for c=0..7 across rows 0..7.
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* Highest read = src_off + 7*stride + (7 + 3) = src_off + 7*stride + 10.
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* Plus 1 for the byte-count semantic of memcpy (length=N copies
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* indices 0..N-1) → src_max = src_off + 7*stride + 11.
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*
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* dst: writes cols 0..7 across rows 0..7.
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* Highest write = dst_off + 7*stride + 7; +1 → dst_off + 7*stride + 8. */
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size_t meta_bytes = n_blocks * 4 * sizeof(uint32_t);
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size_t src_max = 0, dst_max = 0;
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for (size_t i = 0; i < n_blocks; i++) {
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size_t s_end = meta[i].src_off + (size_t) 7 * stride + 11;
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size_t d_end = meta[i].dst_off + (size_t) 7 * stride + 8;
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if (s_end > src_max) src_max = s_end;
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if (d_end > dst_max) dst_max = d_end;
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}
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v3d_buffer bs = {0}, bd = {0}, bm = {0};
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if (v3d_runner_create_buffer(ctx->runner, src_max, &bs)) return -1;
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if (v3d_runner_create_buffer(ctx->runner, dst_max, &bd)) {
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v3d_runner_destroy_buffer(ctx->runner, &bs); return -1;
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}
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if (v3d_runner_create_buffer(ctx->runner, meta_bytes, &bm)) {
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v3d_runner_destroy_buffer(ctx->runner, &bd);
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v3d_runner_destroy_buffer(ctx->runner, &bs); return -1;
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}
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/* Copy src window (filter needs cols -2..+3, captured by src_max
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* upper bound above; the lower bound is implicit in src_off >= 2
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* which the caller guarantees per the public API contract). */
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memcpy(bs.mapped, src, src_max);
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memcpy(bd.mapped, dst, dst_max);
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uint32_t *m = bm.mapped;
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for (size_t i = 0; i < n_blocks; i++) {
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m[4*i+0] = meta[i].dst_off;
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m[4*i+1] = meta[i].src_off;
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m[4*i+2] = 0;
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m[4*i+3] = 0;
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}
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v3d_buffer binds[3] = { bs, bd, bm };
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if (v3d_runner_bind_buffers(ctx->runner, &ctx->h264_qpel_mc20_pipe, binds, 3))
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goto fail;
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uint32_t wg_count = (uint32_t) n_blocks; /* 1 block per WG */
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h264_qpel_mc20_pc pc = {
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.n_blocks = (uint32_t) n_blocks,
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.stride_u8 = (uint32_t) stride,
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};
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VkCommandBuffer cb = v3d_runner_alloc_cmdbuf(ctx->runner);
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if (cb == VK_NULL_HANDLE) goto fail;
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VkCommandBufferBeginInfo cbbi = { .sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_BEGIN_INFO };
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vkBeginCommandBuffer(cb, &cbbi);
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vkCmdBindPipeline(cb, VK_PIPELINE_BIND_POINT_COMPUTE,
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ctx->h264_qpel_mc20_pipe.pipeline);
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vkCmdBindDescriptorSets(cb, VK_PIPELINE_BIND_POINT_COMPUTE,
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ctx->h264_qpel_mc20_pipe.layout, 0, 1,
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&ctx->h264_qpel_mc20_pipe.desc_set, 0, NULL);
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vkCmdPushConstants(cb, ctx->h264_qpel_mc20_pipe.layout,
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VK_SHADER_STAGE_COMPUTE_BIT, 0, sizeof(pc), &pc);
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vkCmdDispatch(cb, wg_count, 1, 1);
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vkEndCommandBuffer(cb);
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if (v3d_runner_submit_wait(ctx->runner, cb)) goto fail;
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memcpy(dst, bd.mapped, dst_max);
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v3d_runner_destroy_buffer(ctx->runner, &bm);
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v3d_runner_destroy_buffer(ctx->runner, &bd);
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v3d_runner_destroy_buffer(ctx->runner, &bs);
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return 0;
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fail:
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v3d_runner_destroy_buffer(ctx->runner, &bm);
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v3d_runner_destroy_buffer(ctx->runner, &bd);
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v3d_runner_destroy_buffer(ctx->runner, &bs);
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return -1;
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}
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/* -------------------- Public dispatch entry points -------------- */
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#define ROUTE_CPU_ONLY(_kernel, _cpu_fn, ...) \
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@@ -1065,8 +1169,16 @@ int daedalus_dispatch_h264_qpel_mc20(daedalus_ctx *ctx, daedalus_substrate sub,
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uint8_t *dst, const uint8_t *src, size_t stride,
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size_t n_blocks, const daedalus_h264_qpel_meta *meta)
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{
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ROUTE_CPU_ONLY(DAEDALUS_KERNEL_H264_QPEL_MC20, dispatch_h264_qpel_mc20_cpu,
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dst, src, stride, n_blocks, meta);
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daedalus_substrate eff = sub;
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if (eff == DAEDALUS_SUBSTRATE_AUTO)
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eff = daedalus_recipe_substrate_for(DAEDALUS_KERNEL_H264_QPEL_MC20);
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if (eff == DAEDALUS_SUBSTRATE_QPU && !daedalus_ctx_has_qpu(ctx))
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eff = DAEDALUS_SUBSTRATE_CPU;
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if (eff == DAEDALUS_SUBSTRATE_CPU)
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return dispatch_h264_qpel_mc20_cpu(ctx, dst, src, stride,
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n_blocks, meta);
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return dispatch_h264_qpel_mc20_qpu(ctx, dst, src, stride,
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n_blocks, meta);
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}
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/* -------------------- Recipe convenience wrappers --------------- */
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@@ -0,0 +1,83 @@
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// daedalus-fourier — H.264 luma qpel mc20 (8x8, horizontal half-pel), V3D 7.1.
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//
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// H.264 spec §8.4.2.2.1 horizontal 6-tap luma interpolation:
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//
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// dst[r,c] = clip255(
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// ( s[r,c-2]
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// - 5 * s[r,c-1]
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// + 20 * s[r,c]
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// + 20 * s[r,c+1]
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// - 5 * s[r,c+2]
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// + s[r,c+3]
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// + 16
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// ) >> 5)
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//
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// Single-stride: dst and src share `stride` (H264QpelContext
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// convention). src+src_off already points at the leftmost output
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// column (col 0); the filter reads cols -2..+3. Caller guarantees
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// edge-padding context per the public API docstring.
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//
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// Workgroup layout: 64 invocations = 1 lane per output pixel.
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// 1 block per WG; n_blocks WGs total. This is the simplest layout
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// that avoids any inter-lane communication — each lane independently
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// reads its 6 src samples and writes its 1 dst sample. V3D's L2
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// cache handles the redundant reads from adjacent lanes.
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//
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// License: BSD-2-Clause.
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#version 450
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#extension GL_EXT_shader_8bit_storage : require
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#extension GL_EXT_shader_explicit_arithmetic_types : require
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layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in;
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layout(binding = 0) readonly buffer Src {
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uint8_t src[];
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} u_src;
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layout(binding = 1) buffer Dst {
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uint8_t dst[];
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} u_dst;
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layout(binding = 2) readonly buffer Meta {
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uvec4 meta[]; // .x = dst_off, .y = src_off
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} u_meta;
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layout(push_constant) uniform PC {
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uint n_blocks;
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uint stride_u8;
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uint _pad0, _pad1;
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} pc;
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void main()
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{
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// 1 block per WG, 64 lanes covering the 8x8 output block.
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uint wg_id = gl_WorkGroupID.x;
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uint block_idx = wg_id;
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if (block_idx >= pc.n_blocks) return;
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uint lane = gl_LocalInvocationID.x;
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uint r = lane >> 3; // 0..7 (row)
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uint c = lane & 7u; // 0..7 (column)
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uint dst_off = u_meta.meta[block_idx].x;
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uint src_off = u_meta.meta[block_idx].y;
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uint stride = pc.stride_u8;
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// src points at output col 0 of the block; filter reads cols -2..+3
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// of the current row. Negative col arithmetic is unsigned-safe
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// because src_off >= 2 (caller-guaranteed left context).
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uint row_base = src_off + r * stride + c;
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int s_m2 = int(u_src.src[row_base - 2u]);
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int s_m1 = int(u_src.src[row_base - 1u]);
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int s_0 = int(u_src.src[row_base + 0u]);
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int s_p1 = int(u_src.src[row_base + 1u]);
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int s_p2 = int(u_src.src[row_base + 2u]);
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int s_p3 = int(u_src.src[row_base + 3u]);
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int v = s_m2 - 5 * s_m1 + 20 * s_0 + 20 * s_p1 - 5 * s_p2 + s_p3 + 16;
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int p = clamp(v >> 5, 0, 255);
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u_dst.dst[dst_off + r * stride + c] = uint8_t(p);
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}
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