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Merge pull request 'h264: V3D shaders for the 4 single-axis quarter-pel qpel variants' (#32) from noether/v3d-shader-h264-qpel-quarter-axis into main

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Reviewed-on: #32
This commit was merged in pull request #32.
This commit is contained in:
Markus Fritsche
2026-05-25 17:09:00 +00:00
parent 8b8e8dc6e8 e3c28495ae
commit 224f4be9e2
6 changed files with 333 additions and 9 deletions
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CMakeLists.txt
+22 -1
View File
@@ -372,7 +372,24 @@ if (DAEDALUS_BUILD_VULKAN)
VERBATIM
)
add_custom_target(daedalus_shaders ALL DEPENDS ${NOOP_SPV} ${IDCT8_SPV} ${LPF_SPV} ${MC_SPV} ${LPF8_SPV} ${CDEF_SPV} ${H264DEBLOCK_SPV} ${H264DEBLOCK_H_SPV} ${H264DEBLOCK_CHROMA_V_SPV} ${H264DEBLOCK_CHROMA_H_SPV} ${H264_IDCT4_SPV} ${H264_IDCT8_SPV} ${H264_QPEL_MC20_SPV} ${H264_QPEL_MC02_SPV} ${H264_QPEL_MC22_SPV})
# Quarter-pel single-axis variants (mc10/30/01/03) — each is the
# corresponding half-pel filter + L2 average with an integer-source
# pixel. Same WG geometry as mc20/mc02.
foreach(_mc mc10 mc30 mc01 mc03)
set(_spv ${CMAKE_BINARY_DIR}/v3d_h264_qpel_${_mc}.spv)
add_custom_command(
OUTPUT ${_spv}
COMMAND ${GLSLANG_VALIDATOR} -V --target-env vulkan1.3
-o ${_spv}
${CMAKE_SOURCE_DIR}/src/v3d_h264_qpel_${_mc}.comp
DEPENDS ${CMAKE_SOURCE_DIR}/src/v3d_h264_qpel_${_mc}.comp
COMMENT "glslang: v3d_h264_qpel_${_mc}.comp -> .spv"
VERBATIM
)
set(H264_QPEL_${_mc}_SPV ${_spv})
endforeach()
add_custom_target(daedalus_shaders ALL DEPENDS ${NOOP_SPV} ${IDCT8_SPV} ${LPF_SPV} ${MC_SPV} ${LPF8_SPV} ${CDEF_SPV} ${H264DEBLOCK_SPV} ${H264DEBLOCK_H_SPV} ${H264DEBLOCK_CHROMA_V_SPV} ${H264DEBLOCK_CHROMA_H_SPV} ${H264_IDCT4_SPV} ${H264_IDCT8_SPV} ${H264_QPEL_MC20_SPV} ${H264_QPEL_MC02_SPV} ${H264_QPEL_MC22_SPV} ${H264_QPEL_mc10_SPV} ${H264_QPEL_mc30_SPV} ${H264_QPEL_mc01_SPV} ${H264_QPEL_mc03_SPV})
# v3d_runner — reusable Vulkan plumbing.
add_library(v3d_runner STATIC src/v3d_runner.c)
@@ -513,6 +530,10 @@ if (DAEDALUS_BUILD_VULKAN)
${H264_QPEL_MC20_SPV}
${H264_QPEL_MC02_SPV}
${H264_QPEL_MC22_SPV}
${H264_QPEL_mc10_SPV}
${H264_QPEL_mc30_SPV}
${H264_QPEL_mc01_SPV}
${H264_QPEL_mc03_SPV}
DESTINATION ${CMAKE_INSTALL_DATADIR}/daedalus-fourier/shaders
)
endif()
src/daedalus_core.c
+132 -8
View File
@@ -56,6 +56,14 @@ struct daedalus_ctx {
v3d_pipeline h264_qpel_mc02_pipe;
int h264_qpel_mc22_pipe_ready;
v3d_pipeline h264_qpel_mc22_pipe;
int h264_qpel_mc10_pipe_ready;
v3d_pipeline h264_qpel_mc10_pipe;
int h264_qpel_mc30_pipe_ready;
v3d_pipeline h264_qpel_mc30_pipe;
int h264_qpel_mc01_pipe_ready;
v3d_pipeline h264_qpel_mc01_pipe;
int h264_qpel_mc03_pipe_ready;
v3d_pipeline h264_qpel_mc03_pipe;
};
daedalus_ctx *daedalus_ctx_create(void)
@@ -118,6 +126,10 @@ void daedalus_ctx_destroy(daedalus_ctx *ctx)
if (ctx->h264_qpel_mc20_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc20_pipe);
if (ctx->h264_qpel_mc02_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc02_pipe);
if (ctx->h264_qpel_mc22_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc22_pipe);
if (ctx->h264_qpel_mc10_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc10_pipe);
if (ctx->h264_qpel_mc30_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc30_pipe);
if (ctx->h264_qpel_mc01_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc01_pipe);
if (ctx->h264_qpel_mc03_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc03_pipe);
v3d_runner_destroy(ctx->runner);
}
free(ctx);
@@ -155,10 +167,10 @@ daedalus_substrate daedalus_recipe_substrate_for(daedalus_kernel k)
case DAEDALUS_KERNEL_H264_QPEL_MC20: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc20.spv */
case DAEDALUS_KERNEL_H264_QPEL_MC02: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc02.spv */
case DAEDALUS_KERNEL_H264_QPEL_MC22: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc22.spv */
case DAEDALUS_KERNEL_H264_QPEL_MC10: return DAEDALUS_SUBSTRATE_CPU; /* ¼-H L2 */
case DAEDALUS_KERNEL_H264_QPEL_MC30: return DAEDALUS_SUBSTRATE_CPU; /* ¾-H L2 */
case DAEDALUS_KERNEL_H264_QPEL_MC01: return DAEDALUS_SUBSTRATE_CPU; /* ¼-V L2 */
case DAEDALUS_KERNEL_H264_QPEL_MC03: return DAEDALUS_SUBSTRATE_CPU; /* ¾-V L2 */
case DAEDALUS_KERNEL_H264_QPEL_MC10: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc10.spv */
case DAEDALUS_KERNEL_H264_QPEL_MC30: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc30.spv */
case DAEDALUS_KERNEL_H264_QPEL_MC01: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc01.spv */
case DAEDALUS_KERNEL_H264_QPEL_MC03: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc03.spv */
case DAEDALUS_KERNEL_H264_QPEL_MC11: return DAEDALUS_SUBSTRATE_CPU; /* diagonal ¼¼ */
case DAEDALUS_KERNEL_H264_QPEL_MC12: return DAEDALUS_SUBSTRATE_CPU; /* diagonal ¼½ */
case DAEDALUS_KERNEL_H264_QPEL_MC13: return DAEDALUS_SUBSTRATE_CPU; /* diagonal ¼¾ */
@@ -1630,6 +1642,98 @@ fail:
return -1;
}
/* Generic QPU dispatch for the 4 single-axis quarter-pel shaders
* (mc10/30 horizontal, mc01/03 vertical). All 4 share the same WG
* geometry (64 lanes/block, 1 block/WG), push-constant layout, and
* 3-binding interface (src/dst/meta) as mc20/mc02. Only src_max
* differs by axis:
* H variants: src_max = src_off + 7*stride + 11 (cols -2..+10)
* V variants: src_max = src_off + 10*stride + 8 (rows -2..+10)
*/
static int dispatch_h264_qpel_axis_qpu(daedalus_ctx *ctx,
v3d_pipeline *pipe, int *pipe_ready, const char *spv,
uint8_t *dst, const uint8_t *src, size_t stride,
size_t n_blocks, const daedalus_h264_qpel_meta *meta,
int axis_v)
{
if (!*pipe_ready) {
if (v3d_runner_create_pipeline(ctx->runner, spv,
3, sizeof(h264_qpel_mc20_pc), pipe) != 0)
return -1;
*pipe_ready = 1;
}
size_t meta_bytes = n_blocks * 4 * sizeof(uint32_t);
size_t src_max = 0, dst_max = 0;
for (size_t i = 0; i < n_blocks; i++) {
size_t s_end = axis_v ? meta[i].src_off + (size_t) 10 * stride + 8
: meta[i].src_off + (size_t) 7 * stride + 11;
size_t d_end = meta[i].dst_off + (size_t) 7 * stride + 8;
if (s_end > src_max) src_max = s_end;
if (d_end > dst_max) dst_max = d_end;
}
v3d_buffer bs = {0}, bd = {0}, bm = {0};
if (v3d_runner_create_buffer(ctx->runner, src_max, &bs)) return -1;
if (v3d_runner_create_buffer(ctx->runner, dst_max, &bd)) {
v3d_runner_destroy_buffer(ctx->runner, &bs); return -1;
}
if (v3d_runner_create_buffer(ctx->runner, meta_bytes, &bm)) {
v3d_runner_destroy_buffer(ctx->runner, &bd);
v3d_runner_destroy_buffer(ctx->runner, &bs); return -1;
}
memcpy(bs.mapped, src, src_max);
memcpy(bd.mapped, dst, dst_max);
uint32_t *m = bm.mapped;
for (size_t i = 0; i < n_blocks; i++) {
m[4*i+0] = meta[i].dst_off;
m[4*i+1] = meta[i].src_off;
m[4*i+2] = 0;
m[4*i+3] = 0;
}
v3d_buffer binds[3] = { bs, bd, bm };
if (v3d_runner_bind_buffers(ctx->runner, pipe, binds, 3)) goto fail;
h264_qpel_mc20_pc pc = { .n_blocks = (uint32_t) n_blocks,
.stride_u8 = (uint32_t) stride };
VkCommandBuffer cb = v3d_runner_alloc_cmdbuf(ctx->runner);
if (cb == VK_NULL_HANDLE) goto fail;
VkCommandBufferBeginInfo cbbi = { .sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_BEGIN_INFO };
vkBeginCommandBuffer(cb, &cbbi);
vkCmdBindPipeline(cb, VK_PIPELINE_BIND_POINT_COMPUTE, pipe->pipeline);
vkCmdBindDescriptorSets(cb, VK_PIPELINE_BIND_POINT_COMPUTE,
pipe->layout, 0, 1, &pipe->desc_set, 0, NULL);
vkCmdPushConstants(cb, pipe->layout, VK_SHADER_STAGE_COMPUTE_BIT,
0, sizeof(pc), &pc);
vkCmdDispatch(cb, (uint32_t) n_blocks, 1, 1);
vkEndCommandBuffer(cb);
if (v3d_runner_submit_wait(ctx->runner, cb)) goto fail;
memcpy(dst, bd.mapped, dst_max);
v3d_runner_destroy_buffer(ctx->runner, &bm);
v3d_runner_destroy_buffer(ctx->runner, &bd);
v3d_runner_destroy_buffer(ctx->runner, &bs);
return 0;
fail:
v3d_runner_destroy_buffer(ctx->runner, &bm);
v3d_runner_destroy_buffer(ctx->runner, &bd);
v3d_runner_destroy_buffer(ctx->runner, &bs);
return -1;
}
#define DEFINE_QPEL_AXIS_QPU(name, spv, axis_v) \
static int dispatch_h264_qpel_ ## name ## _qpu(daedalus_ctx *ctx, \
uint8_t *dst, const uint8_t *src, size_t stride, \
size_t n_blocks, const daedalus_h264_qpel_meta *meta) \
{ \
return dispatch_h264_qpel_axis_qpu(ctx, &ctx->h264_qpel_ ## name ## _pipe, \
&ctx->h264_qpel_ ## name ## _pipe_ready, spv, dst, src, stride, \
n_blocks, meta, axis_v); \
}
DEFINE_QPEL_AXIS_QPU(mc10, "v3d_h264_qpel_mc10.spv", 0)
DEFINE_QPEL_AXIS_QPU(mc30, "v3d_h264_qpel_mc30.spv", 0)
DEFINE_QPEL_AXIS_QPU(mc01, "v3d_h264_qpel_mc01.spv", 1)
DEFINE_QPEL_AXIS_QPU(mc03, "v3d_h264_qpel_mc03.spv", 1)
#undef DEFINE_QPEL_AXIS_QPU
/* -------------------- Public dispatch entry points -------------- */
#define ROUTE_CPU_ONLY(_kernel, _cpu_fn, ...) \
@@ -1883,10 +1987,30 @@ int daedalus_dispatch_h264_qpel_ ## suffix(daedalus_ctx *ctx, \
n_blocks, meta); \
}
DEFINE_QPEL_DISPATCH(mc10, DAEDALUS_KERNEL_H264_QPEL_MC10)
DEFINE_QPEL_DISPATCH(mc30, DAEDALUS_KERNEL_H264_QPEL_MC30)
DEFINE_QPEL_DISPATCH(mc01, DAEDALUS_KERNEL_H264_QPEL_MC01)
DEFINE_QPEL_DISPATCH(mc03, DAEDALUS_KERNEL_H264_QPEL_MC03)
/* mc10/30/01/03 now have QPU shaders — explicit definitions instead of
* the no-QPU DEFINE_QPEL_DISPATCH macro. Same routing shape as mc20/02. */
#define DEFINE_QPEL_DISPATCH_QPU(suffix, kernel) \
int daedalus_dispatch_h264_qpel_ ## suffix(daedalus_ctx *ctx, \
daedalus_substrate sub, uint8_t *dst, const uint8_t *src, size_t stride, \
size_t n_blocks, const daedalus_h264_qpel_meta *meta) \
{ \
daedalus_substrate eff = sub; \
if (eff == DAEDALUS_SUBSTRATE_AUTO) \
eff = daedalus_recipe_substrate_for(kernel); \
if (eff == DAEDALUS_SUBSTRATE_QPU && !daedalus_ctx_has_qpu(ctx)) \
eff = DAEDALUS_SUBSTRATE_CPU; \
if (eff == DAEDALUS_SUBSTRATE_CPU) \
return dispatch_h264_qpel_ ## suffix ## _cpu(ctx, dst, src, stride, \
n_blocks, meta); \
return dispatch_h264_qpel_ ## suffix ## _qpu(ctx, dst, src, stride, \
n_blocks, meta); \
}
DEFINE_QPEL_DISPATCH_QPU(mc10, DAEDALUS_KERNEL_H264_QPEL_MC10)
DEFINE_QPEL_DISPATCH_QPU(mc30, DAEDALUS_KERNEL_H264_QPEL_MC30)
DEFINE_QPEL_DISPATCH_QPU(mc01, DAEDALUS_KERNEL_H264_QPEL_MC01)
DEFINE_QPEL_DISPATCH_QPU(mc03, DAEDALUS_KERNEL_H264_QPEL_MC03)
#undef DEFINE_QPEL_DISPATCH_QPU
DEFINE_QPEL_DISPATCH(mc11, DAEDALUS_KERNEL_H264_QPEL_MC11)
DEFINE_QPEL_DISPATCH(mc12, DAEDALUS_KERNEL_H264_QPEL_MC12)
DEFINE_QPEL_DISPATCH(mc13, DAEDALUS_KERNEL_H264_QPEL_MC13)
src/v3d_h264_qpel_mc01.comp
+44
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@@ -0,0 +1,44 @@
// daedalus-fourier — H.264 luma qpel mc01 (8x8, ¼-pel vertical),
// V3D 7.1. Per H.264 §8.4.2.2.1 "d" position:
//
// dst[r,c] = ((clip255(mc02(s)[r,c]) + s[r,c] + 1) >> 1)
//
// Sibling of v3d_h264_qpel_mc02.comp with L2 step against src[r, c].
//
// License: BSD-2-Clause.
#version 450
#extension GL_EXT_shader_8bit_storage : require
#extension GL_EXT_shader_explicit_arithmetic_types : require
layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in;
layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src;
layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst;
layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta;
layout(push_constant) uniform PC { uint n_blocks, stride_u8, _p0, _p1; } pc;
void main()
{
uint block_idx = gl_WorkGroupID.x;
if (block_idx >= pc.n_blocks) return;
uint lane = gl_LocalInvocationID.x;
uint r = lane >> 3, c = lane & 7u;
uint dst_off = u_meta.meta[block_idx].x;
uint src_off = u_meta.meta[block_idx].y;
uint stride = pc.stride_u8;
uint col_base = src_off + c;
int s_m2 = int(u_src.src[col_base + (r - 2u) * stride]);
int s_m1 = int(u_src.src[col_base + (r - 1u) * stride]);
int s_0 = int(u_src.src[col_base + r * stride]);
int s_p1 = int(u_src.src[col_base + (r + 1u) * stride]);
int s_p2 = int(u_src.src[col_base + (r + 2u) * stride]);
int s_p3 = int(u_src.src[col_base + (r + 3u) * stride]);
int v = s_m2 - 5 * s_m1 + 20 * s_0 + 20 * s_p1 - 5 * s_p2 + s_p3 + 16;
int vp = clamp(v >> 5, 0, 255);
int avg = (vp + s_0 + 1) >> 1; // L2 with src[r, c]
u_dst.dst[dst_off + r * stride + c] = uint8_t(avg);
}
src/v3d_h264_qpel_mc03.comp
+44
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@@ -0,0 +1,44 @@
// daedalus-fourier — H.264 luma qpel mc03 (8x8, ¾-pel vertical),
// V3D 7.1. Per H.264 §8.4.2.2.1 "n" position:
//
// dst[r,c] = ((clip255(mc02(s)[r,c]) + s[r+1, c] + 1) >> 1)
//
// Same as mc01 but L2-averages with src[r+1, c] instead of src[r, c].
//
// License: BSD-2-Clause.
#version 450
#extension GL_EXT_shader_8bit_storage : require
#extension GL_EXT_shader_explicit_arithmetic_types : require
layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in;
layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src;
layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst;
layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta;
layout(push_constant) uniform PC { uint n_blocks, stride_u8, _p0, _p1; } pc;
void main()
{
uint block_idx = gl_WorkGroupID.x;
if (block_idx >= pc.n_blocks) return;
uint lane = gl_LocalInvocationID.x;
uint r = lane >> 3, c = lane & 7u;
uint dst_off = u_meta.meta[block_idx].x;
uint src_off = u_meta.meta[block_idx].y;
uint stride = pc.stride_u8;
uint col_base = src_off + c;
int s_m2 = int(u_src.src[col_base + (r - 2u) * stride]);
int s_m1 = int(u_src.src[col_base + (r - 1u) * stride]);
int s_0 = int(u_src.src[col_base + r * stride]);
int s_p1 = int(u_src.src[col_base + (r + 1u) * stride]);
int s_p2 = int(u_src.src[col_base + (r + 2u) * stride]);
int s_p3 = int(u_src.src[col_base + (r + 3u) * stride]);
int v = s_m2 - 5 * s_m1 + 20 * s_0 + 20 * s_p1 - 5 * s_p2 + s_p3 + 16;
int vp = clamp(v >> 5, 0, 255);
int avg = (vp + s_p1 + 1) >> 1; // L2 with src[r+1, c]
u_dst.dst[dst_off + r * stride + c] = uint8_t(avg);
}
src/v3d_h264_qpel_mc10.comp
+47
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@@ -0,0 +1,47 @@
// daedalus-fourier — H.264 luma qpel mc10 (8x8, ¼-pel horizontal),
// V3D 7.1. Per H.264 §8.4.2.2.1 "a" position:
//
// dst[r,c] = ((clip255(mc20(s)[r,c]) + s[r,c] + 1) >> 1)
//
// = horizontal half-pel filter, clipped to u8, then L2 rounded-averaged
// with the integer source pixel at the SAME position. Sibling of
// v3d_h264_qpel_mc20.comp with the L2 step added at the tail.
//
// License: BSD-2-Clause.
#version 450
#extension GL_EXT_shader_8bit_storage : require
#extension GL_EXT_shader_explicit_arithmetic_types : require
layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in;
layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src;
layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst;
layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta;
layout(push_constant) uniform PC { uint n_blocks, stride_u8, _p0, _p1; } pc;
void main()
{
uint block_idx = gl_WorkGroupID.x;
if (block_idx >= pc.n_blocks) return;
uint lane = gl_LocalInvocationID.x;
uint r = lane >> 3, c = lane & 7u;
uint dst_off = u_meta.meta[block_idx].x;
uint src_off = u_meta.meta[block_idx].y;
uint stride = pc.stride_u8;
uint row_base = src_off + r * stride + c;
int s_m2 = int(u_src.src[row_base - 2u]);
int s_m1 = int(u_src.src[row_base - 1u]);
int s_0 = int(u_src.src[row_base ]);
int s_p1 = int(u_src.src[row_base + 1u]);
int s_p2 = int(u_src.src[row_base + 2u]);
int s_p3 = int(u_src.src[row_base + 3u]);
int v = s_m2 - 5 * s_m1 + 20 * s_0 + 20 * s_p1 - 5 * s_p2 + s_p3 + 16;
int hp = clamp(v >> 5, 0, 255);
// L2 average with the integer source at the SAME (r, c) position.
int avg = (hp + s_0 + 1) >> 1;
u_dst.dst[dst_off + r * stride + c] = uint8_t(avg);
}
src/v3d_h264_qpel_mc30.comp
+44
View File
@@ -0,0 +1,44 @@
// daedalus-fourier — H.264 luma qpel mc30 (8x8, ¾-pel horizontal),
// V3D 7.1. Per H.264 §8.4.2.2.1 "c" position:
//
// dst[r,c] = ((clip255(mc20(s)[r,c]) + s[r,c+1] + 1) >> 1)
//
// Same as mc10 but L2-averages with src[r, c+1] instead of src[r, c].
//
// License: BSD-2-Clause.
#version 450
#extension GL_EXT_shader_8bit_storage : require
#extension GL_EXT_shader_explicit_arithmetic_types : require
layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in;
layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src;
layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst;
layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta;
layout(push_constant) uniform PC { uint n_blocks, stride_u8, _p0, _p1; } pc;
void main()
{
uint block_idx = gl_WorkGroupID.x;
if (block_idx >= pc.n_blocks) return;
uint lane = gl_LocalInvocationID.x;
uint r = lane >> 3, c = lane & 7u;
uint dst_off = u_meta.meta[block_idx].x;
uint src_off = u_meta.meta[block_idx].y;
uint stride = pc.stride_u8;
uint row_base = src_off + r * stride + c;
int s_m2 = int(u_src.src[row_base - 2u]);
int s_m1 = int(u_src.src[row_base - 1u]);
int s_0 = int(u_src.src[row_base ]);
int s_p1 = int(u_src.src[row_base + 1u]);
int s_p2 = int(u_src.src[row_base + 2u]);
int s_p3 = int(u_src.src[row_base + 3u]);
int v = s_m2 - 5 * s_m1 + 20 * s_0 + 20 * s_p1 - 5 * s_p2 + s_p3 + 16;
int hp = clamp(v >> 5, 0, 255);
int avg = (hp + s_p1 + 1) >> 1; // L2 with src[r, c+1]
u_dst.dst[dst_off + r * stride + c] = uint8_t(avg);
}