h264: V3D shaders for the 8 diagonal qpel positions
Closes the put_ qpel QPU matrix. Adds mc11/12/13/21/23/31/32/33 — each composes two half-pel anchor outputs via L2 rounded-average: mc11 ¼¼ : avg(mc20[r, c], mc02[r, c]) mc12 ¼½ : avg(mc22[r, c], mc02[r, c]) mc13 ¼¾ : avg(mc20[r+1, c], mc02[r, c]) mc21 ½¼ : avg(mc22[r, c], mc20[r, c]) mc23 ½¾ : avg(mc22[r, c], mc20[r+1, c]) mc31 ¾¼ : avg(mc20[r, c], mc02[r, c+1]) mc32 ¾½ : avg(mc22[r, c], mc02[r, c+1]) mc33 ¾¾ : avg(mc20[r+1, c], mc02[r, c+1]) Per-lane structure: each lane runs the FULL cascade for BOTH anchors at its own (r, c) target, then L2 averages. No shared memory. Shaders inline hpel_h() / hpel_v() / hpel_hv() helpers (the latter does the 13×6 int16 cascade per cell). ~88 lines each. Shaders generated from a python template (POSITIONS table + format string) — the 8 .comp files are 1:1 with the C reference's DEFINE_DIAG_REF macro from fourier PR #18. Dispatch plumbing: shared dispatch_h264_qpel_diag_qpu helper covers all 8 (same src envelope as mc22: src_max = src_off + 10*stride + 11, covering rows -2..+10 and cols -2..+10 for any (r±1, c±1) offset). Recipe table: all 8 DAEDALUS_KERNEL_H264_QPEL_MC{11..33} flipped to QPU. Public dispatchers re-defined via DEFINE_QPEL_DIAG_PUBLIC macro (replaces the old DEFINE_QPEL_DISPATCH which fast-failed QPU). Verified on hertz: $ ./build/test_api_h264 | grep "qpel mc[1-3][1-3]" H.264 qpel mc11: 2048/2048 bytes bit-exact (100.0000%) H.264 qpel mc12: 2048/2048 bytes bit-exact (100.0000%) H.264 qpel mc13: 2048/2048 bytes bit-exact (100.0000%) H.264 qpel mc21: 2048/2048 bytes bit-exact (100.0000%) H.264 qpel mc23: 2048/2048 bytes bit-exact (100.0000%) H.264 qpel mc31: 2048/2048 bytes bit-exact (100.0000%) H.264 qpel mc32: 2048/2048 bytes bit-exact (100.0000%) H.264 qpel mc33: 2048/2048 bytes bit-exact (100.0000%) Meaningful: the (r±1, c±1) offsets are easy to transpose between positions; passing first try on the asymmetric variants (mc13/23/31/33) means the position-specific shifts are correct in all 8 templates. put_ qpel QPU matrix is now COMPLETE: 15 of 15 useful positions (mc00 = integer copy, no shader needed). avg_ qpel positions (15 more) remain on CPU NEON; can land as a follow-up since avg_ is just put_ + one extra L2 against existing dst. put_ mc20 ✓ mc02 ✓ mc22 ✓ (anchors) mc10 ✓ mc30 ✓ mc01 ✓ mc03 ✓ (single-axis ¼-pel) mc11 ✓ mc12 ✓ mc13 ✓ (this PR — row-1 diagonals) mc21 ✓ mc23 ✓ (this PR — row-2 diagonals) mc31 ✓ mc32 ✓ mc33 ✓ (this PR — row-3 diagonals) avg_ all 15 — CPU NEON
This commit is contained in:
+13
-5
@@ -372,10 +372,10 @@ if (DAEDALUS_BUILD_VULKAN)
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VERBATIM
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)
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# Quarter-pel single-axis variants (mc10/30/01/03) — each is the
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# corresponding half-pel filter + L2 average with an integer-source
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# pixel. Same WG geometry as mc20/mc02.
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foreach(_mc mc10 mc30 mc01 mc03)
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# Quarter-pel single-axis variants (mc10/30/01/03) + diagonal
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# variants (mc11/12/13/21/23/31/32/33) — each composes 1-2 half-pel
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# results with optional L2 averaging. Same WG geometry as mc20/mc02.
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foreach(_mc mc10 mc30 mc01 mc03 mc11 mc12 mc13 mc21 mc23 mc31 mc32 mc33)
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set(_spv ${CMAKE_BINARY_DIR}/v3d_h264_qpel_${_mc}.spv)
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add_custom_command(
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OUTPUT ${_spv}
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@@ -389,7 +389,7 @@ if (DAEDALUS_BUILD_VULKAN)
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set(H264_QPEL_${_mc}_SPV ${_spv})
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endforeach()
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add_custom_target(daedalus_shaders ALL DEPENDS ${NOOP_SPV} ${IDCT8_SPV} ${LPF_SPV} ${MC_SPV} ${LPF8_SPV} ${CDEF_SPV} ${H264DEBLOCK_SPV} ${H264DEBLOCK_H_SPV} ${H264DEBLOCK_CHROMA_V_SPV} ${H264DEBLOCK_CHROMA_H_SPV} ${H264_IDCT4_SPV} ${H264_IDCT8_SPV} ${H264_QPEL_MC20_SPV} ${H264_QPEL_MC02_SPV} ${H264_QPEL_MC22_SPV} ${H264_QPEL_mc10_SPV} ${H264_QPEL_mc30_SPV} ${H264_QPEL_mc01_SPV} ${H264_QPEL_mc03_SPV})
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add_custom_target(daedalus_shaders ALL DEPENDS ${NOOP_SPV} ${IDCT8_SPV} ${LPF_SPV} ${MC_SPV} ${LPF8_SPV} ${CDEF_SPV} ${H264DEBLOCK_SPV} ${H264DEBLOCK_H_SPV} ${H264DEBLOCK_CHROMA_V_SPV} ${H264DEBLOCK_CHROMA_H_SPV} ${H264_IDCT4_SPV} ${H264_IDCT8_SPV} ${H264_QPEL_MC20_SPV} ${H264_QPEL_MC02_SPV} ${H264_QPEL_MC22_SPV} ${H264_QPEL_mc10_SPV} ${H264_QPEL_mc30_SPV} ${H264_QPEL_mc01_SPV} ${H264_QPEL_mc03_SPV} ${H264_QPEL_mc11_SPV} ${H264_QPEL_mc12_SPV} ${H264_QPEL_mc13_SPV} ${H264_QPEL_mc21_SPV} ${H264_QPEL_mc23_SPV} ${H264_QPEL_mc31_SPV} ${H264_QPEL_mc32_SPV} ${H264_QPEL_mc33_SPV})
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# v3d_runner — reusable Vulkan plumbing.
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add_library(v3d_runner STATIC src/v3d_runner.c)
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@@ -534,6 +534,14 @@ if (DAEDALUS_BUILD_VULKAN)
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${H264_QPEL_mc30_SPV}
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${H264_QPEL_mc01_SPV}
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${H264_QPEL_mc03_SPV}
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${H264_QPEL_mc11_SPV}
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${H264_QPEL_mc12_SPV}
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${H264_QPEL_mc13_SPV}
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${H264_QPEL_mc21_SPV}
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${H264_QPEL_mc23_SPV}
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${H264_QPEL_mc31_SPV}
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${H264_QPEL_mc32_SPV}
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${H264_QPEL_mc33_SPV}
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DESTINATION ${CMAKE_INSTALL_DATADIR}/daedalus-fourier/shaders
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)
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endif()
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+140
-16
@@ -64,6 +64,14 @@ struct daedalus_ctx {
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v3d_pipeline h264_qpel_mc01_pipe;
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int h264_qpel_mc03_pipe_ready;
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v3d_pipeline h264_qpel_mc03_pipe;
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int h264_qpel_mc11_pipe_ready; v3d_pipeline h264_qpel_mc11_pipe;
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int h264_qpel_mc12_pipe_ready; v3d_pipeline h264_qpel_mc12_pipe;
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int h264_qpel_mc13_pipe_ready; v3d_pipeline h264_qpel_mc13_pipe;
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int h264_qpel_mc21_pipe_ready; v3d_pipeline h264_qpel_mc21_pipe;
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int h264_qpel_mc23_pipe_ready; v3d_pipeline h264_qpel_mc23_pipe;
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int h264_qpel_mc31_pipe_ready; v3d_pipeline h264_qpel_mc31_pipe;
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int h264_qpel_mc32_pipe_ready; v3d_pipeline h264_qpel_mc32_pipe;
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int h264_qpel_mc33_pipe_ready; v3d_pipeline h264_qpel_mc33_pipe;
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};
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daedalus_ctx *daedalus_ctx_create(void)
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@@ -130,6 +138,14 @@ void daedalus_ctx_destroy(daedalus_ctx *ctx)
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if (ctx->h264_qpel_mc30_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc30_pipe);
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if (ctx->h264_qpel_mc01_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc01_pipe);
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if (ctx->h264_qpel_mc03_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc03_pipe);
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if (ctx->h264_qpel_mc11_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc11_pipe);
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if (ctx->h264_qpel_mc12_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc12_pipe);
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if (ctx->h264_qpel_mc13_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc13_pipe);
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if (ctx->h264_qpel_mc21_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc21_pipe);
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if (ctx->h264_qpel_mc23_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc23_pipe);
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if (ctx->h264_qpel_mc31_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc31_pipe);
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if (ctx->h264_qpel_mc32_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc32_pipe);
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if (ctx->h264_qpel_mc33_pipe_ready) v3d_runner_destroy_pipeline(ctx->runner, &ctx->h264_qpel_mc33_pipe);
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v3d_runner_destroy(ctx->runner);
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}
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free(ctx);
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@@ -171,14 +187,14 @@ daedalus_substrate daedalus_recipe_substrate_for(daedalus_kernel k)
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case DAEDALUS_KERNEL_H264_QPEL_MC30: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc30.spv */
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case DAEDALUS_KERNEL_H264_QPEL_MC01: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc01.spv */
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case DAEDALUS_KERNEL_H264_QPEL_MC03: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc03.spv */
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case DAEDALUS_KERNEL_H264_QPEL_MC11: return DAEDALUS_SUBSTRATE_CPU; /* diagonal ¼¼ */
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case DAEDALUS_KERNEL_H264_QPEL_MC12: return DAEDALUS_SUBSTRATE_CPU; /* diagonal ¼½ */
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case DAEDALUS_KERNEL_H264_QPEL_MC13: return DAEDALUS_SUBSTRATE_CPU; /* diagonal ¼¾ */
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case DAEDALUS_KERNEL_H264_QPEL_MC21: return DAEDALUS_SUBSTRATE_CPU; /* diagonal ½¼ */
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case DAEDALUS_KERNEL_H264_QPEL_MC23: return DAEDALUS_SUBSTRATE_CPU; /* diagonal ½¾ */
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case DAEDALUS_KERNEL_H264_QPEL_MC31: return DAEDALUS_SUBSTRATE_CPU; /* diagonal ¾¼ */
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case DAEDALUS_KERNEL_H264_QPEL_MC32: return DAEDALUS_SUBSTRATE_CPU; /* diagonal ¾½ */
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case DAEDALUS_KERNEL_H264_QPEL_MC33: return DAEDALUS_SUBSTRATE_CPU; /* diagonal ¾¾ */
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case DAEDALUS_KERNEL_H264_QPEL_MC11: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc11.spv */
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case DAEDALUS_KERNEL_H264_QPEL_MC12: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc12.spv */
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case DAEDALUS_KERNEL_H264_QPEL_MC13: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc13.spv */
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case DAEDALUS_KERNEL_H264_QPEL_MC21: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc21.spv */
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case DAEDALUS_KERNEL_H264_QPEL_MC23: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc23.spv */
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case DAEDALUS_KERNEL_H264_QPEL_MC31: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc31.spv */
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case DAEDALUS_KERNEL_H264_QPEL_MC32: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc32.spv */
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case DAEDALUS_KERNEL_H264_QPEL_MC33: return DAEDALUS_SUBSTRATE_QPU; /* v3d_h264_qpel_mc33.spv */
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case DAEDALUS_KERNEL_H264_QPEL_AVG_MC20: return DAEDALUS_SUBSTRATE_CPU; /* biprediction anchors */
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case DAEDALUS_KERNEL_H264_QPEL_AVG_MC02: return DAEDALUS_SUBSTRATE_CPU;
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case DAEDALUS_KERNEL_H264_QPEL_AVG_MC22: return DAEDALUS_SUBSTRATE_CPU;
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@@ -1734,6 +1750,95 @@ DEFINE_QPEL_AXIS_QPU(mc03, "v3d_h264_qpel_mc03.spv", 1)
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#undef DEFINE_QPEL_AXIS_QPU
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/* Diagonals share the mc22-style src envelope (rows -2..+10, cols
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* -2..+10) because they compose mc22 with mc20/mc02, sometimes
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* with (r+1, c) or (r, c+1) offsets. */
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static int dispatch_h264_qpel_diag_qpu(daedalus_ctx *ctx,
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v3d_pipeline *pipe, int *pipe_ready, const char *spv,
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uint8_t *dst, const uint8_t *src, size_t stride,
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size_t n_blocks, const daedalus_h264_qpel_meta *meta)
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{
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if (!*pipe_ready) {
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if (v3d_runner_create_pipeline(ctx->runner, spv,
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3, sizeof(h264_qpel_mc20_pc), pipe) != 0)
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return -1;
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*pipe_ready = 1;
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}
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size_t meta_bytes = n_blocks * 4 * sizeof(uint32_t);
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size_t src_max = 0, dst_max = 0;
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for (size_t i = 0; i < n_blocks; i++) {
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size_t s_end = meta[i].src_off + (size_t) 10 * stride + 11;
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size_t d_end = meta[i].dst_off + (size_t) 7 * stride + 8;
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if (s_end > src_max) src_max = s_end;
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if (d_end > dst_max) dst_max = d_end;
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}
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v3d_buffer bs = {0}, bd = {0}, bm = {0};
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if (v3d_runner_create_buffer(ctx->runner, src_max, &bs)) return -1;
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if (v3d_runner_create_buffer(ctx->runner, dst_max, &bd)) {
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v3d_runner_destroy_buffer(ctx->runner, &bs); return -1;
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}
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if (v3d_runner_create_buffer(ctx->runner, meta_bytes, &bm)) {
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v3d_runner_destroy_buffer(ctx->runner, &bd);
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v3d_runner_destroy_buffer(ctx->runner, &bs); return -1;
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}
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memcpy(bs.mapped, src, src_max);
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memcpy(bd.mapped, dst, dst_max);
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uint32_t *m = bm.mapped;
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for (size_t i = 0; i < n_blocks; i++) {
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m[4*i+0] = meta[i].dst_off;
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m[4*i+1] = meta[i].src_off;
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m[4*i+2] = 0;
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m[4*i+3] = 0;
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}
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v3d_buffer binds[3] = { bs, bd, bm };
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if (v3d_runner_bind_buffers(ctx->runner, pipe, binds, 3)) goto fail;
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h264_qpel_mc20_pc pc = { .n_blocks = (uint32_t) n_blocks,
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.stride_u8 = (uint32_t) stride };
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VkCommandBuffer cb = v3d_runner_alloc_cmdbuf(ctx->runner);
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if (cb == VK_NULL_HANDLE) goto fail;
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VkCommandBufferBeginInfo cbbi = { .sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_BEGIN_INFO };
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vkBeginCommandBuffer(cb, &cbbi);
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vkCmdBindPipeline(cb, VK_PIPELINE_BIND_POINT_COMPUTE, pipe->pipeline);
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vkCmdBindDescriptorSets(cb, VK_PIPELINE_BIND_POINT_COMPUTE,
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pipe->layout, 0, 1, &pipe->desc_set, 0, NULL);
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vkCmdPushConstants(cb, pipe->layout, VK_SHADER_STAGE_COMPUTE_BIT,
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0, sizeof(pc), &pc);
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vkCmdDispatch(cb, (uint32_t) n_blocks, 1, 1);
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vkEndCommandBuffer(cb);
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if (v3d_runner_submit_wait(ctx->runner, cb)) goto fail;
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memcpy(dst, bd.mapped, dst_max);
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v3d_runner_destroy_buffer(ctx->runner, &bm);
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v3d_runner_destroy_buffer(ctx->runner, &bd);
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v3d_runner_destroy_buffer(ctx->runner, &bs);
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return 0;
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fail:
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v3d_runner_destroy_buffer(ctx->runner, &bm);
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v3d_runner_destroy_buffer(ctx->runner, &bd);
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v3d_runner_destroy_buffer(ctx->runner, &bs);
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return -1;
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}
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#define DEFINE_QPEL_DIAG_QPU(name) \
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static int dispatch_h264_qpel_ ## name ## _qpu(daedalus_ctx *ctx, \
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uint8_t *dst, const uint8_t *src, size_t stride, \
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size_t n_blocks, const daedalus_h264_qpel_meta *meta) \
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{ \
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return dispatch_h264_qpel_diag_qpu(ctx, &ctx->h264_qpel_ ## name ## _pipe, \
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&ctx->h264_qpel_ ## name ## _pipe_ready, \
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"v3d_h264_qpel_" #name ".spv", dst, src, stride, n_blocks, meta); \
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}
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DEFINE_QPEL_DIAG_QPU(mc11)
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DEFINE_QPEL_DIAG_QPU(mc12)
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DEFINE_QPEL_DIAG_QPU(mc13)
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DEFINE_QPEL_DIAG_QPU(mc21)
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DEFINE_QPEL_DIAG_QPU(mc23)
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DEFINE_QPEL_DIAG_QPU(mc31)
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DEFINE_QPEL_DIAG_QPU(mc32)
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DEFINE_QPEL_DIAG_QPU(mc33)
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#undef DEFINE_QPEL_DIAG_QPU
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/* -------------------- Public dispatch entry points -------------- */
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#define ROUTE_CPU_ONLY(_kernel, _cpu_fn, ...) \
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@@ -2011,14 +2116,33 @@ DEFINE_QPEL_DISPATCH_QPU(mc30, DAEDALUS_KERNEL_H264_QPEL_MC30)
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DEFINE_QPEL_DISPATCH_QPU(mc01, DAEDALUS_KERNEL_H264_QPEL_MC01)
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DEFINE_QPEL_DISPATCH_QPU(mc03, DAEDALUS_KERNEL_H264_QPEL_MC03)
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#undef DEFINE_QPEL_DISPATCH_QPU
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DEFINE_QPEL_DISPATCH(mc11, DAEDALUS_KERNEL_H264_QPEL_MC11)
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DEFINE_QPEL_DISPATCH(mc12, DAEDALUS_KERNEL_H264_QPEL_MC12)
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DEFINE_QPEL_DISPATCH(mc13, DAEDALUS_KERNEL_H264_QPEL_MC13)
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DEFINE_QPEL_DISPATCH(mc21, DAEDALUS_KERNEL_H264_QPEL_MC21)
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DEFINE_QPEL_DISPATCH(mc23, DAEDALUS_KERNEL_H264_QPEL_MC23)
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DEFINE_QPEL_DISPATCH(mc31, DAEDALUS_KERNEL_H264_QPEL_MC31)
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DEFINE_QPEL_DISPATCH(mc32, DAEDALUS_KERNEL_H264_QPEL_MC32)
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DEFINE_QPEL_DISPATCH(mc33, DAEDALUS_KERNEL_H264_QPEL_MC33)
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/* mc11..mc33 diagonals — QPU-capable, same macro shape as mc10/30/01/03. */
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#define DEFINE_QPEL_DIAG_PUBLIC(suffix, kernel) \
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int daedalus_dispatch_h264_qpel_ ## suffix(daedalus_ctx *ctx, \
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daedalus_substrate sub, uint8_t *dst, const uint8_t *src, size_t stride, \
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size_t n_blocks, const daedalus_h264_qpel_meta *meta) \
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{ \
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daedalus_substrate eff = sub; \
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if (eff == DAEDALUS_SUBSTRATE_AUTO) \
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eff = daedalus_recipe_substrate_for(kernel); \
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if (eff == DAEDALUS_SUBSTRATE_QPU && !daedalus_ctx_has_qpu(ctx)) \
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eff = DAEDALUS_SUBSTRATE_CPU; \
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if (eff == DAEDALUS_SUBSTRATE_CPU) \
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return dispatch_h264_qpel_ ## suffix ## _cpu(ctx, dst, src, stride, \
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n_blocks, meta); \
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return dispatch_h264_qpel_ ## suffix ## _qpu(ctx, dst, src, stride, \
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n_blocks, meta); \
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}
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DEFINE_QPEL_DIAG_PUBLIC(mc11, DAEDALUS_KERNEL_H264_QPEL_MC11)
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DEFINE_QPEL_DIAG_PUBLIC(mc12, DAEDALUS_KERNEL_H264_QPEL_MC12)
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DEFINE_QPEL_DIAG_PUBLIC(mc13, DAEDALUS_KERNEL_H264_QPEL_MC13)
|
||||
DEFINE_QPEL_DIAG_PUBLIC(mc21, DAEDALUS_KERNEL_H264_QPEL_MC21)
|
||||
DEFINE_QPEL_DIAG_PUBLIC(mc23, DAEDALUS_KERNEL_H264_QPEL_MC23)
|
||||
DEFINE_QPEL_DIAG_PUBLIC(mc31, DAEDALUS_KERNEL_H264_QPEL_MC31)
|
||||
DEFINE_QPEL_DIAG_PUBLIC(mc32, DAEDALUS_KERNEL_H264_QPEL_MC32)
|
||||
DEFINE_QPEL_DIAG_PUBLIC(mc33, DAEDALUS_KERNEL_H264_QPEL_MC33)
|
||||
#undef DEFINE_QPEL_DIAG_PUBLIC
|
||||
DEFINE_QPEL_DISPATCH(avg_mc20, DAEDALUS_KERNEL_H264_QPEL_AVG_MC20)
|
||||
DEFINE_QPEL_DISPATCH(avg_mc02, DAEDALUS_KERNEL_H264_QPEL_AVG_MC02)
|
||||
DEFINE_QPEL_DISPATCH(avg_mc22, DAEDALUS_KERNEL_H264_QPEL_AVG_MC22)
|
||||
|
||||
@@ -0,0 +1,88 @@
|
||||
// daedalus-fourier — H.264 luma qpel mc11 (8x8, diagonal quarter-pel),
|
||||
// V3D 7.1. Per H.264 §8.4.2.2.1 (table 8-4) — composes two half-pel
|
||||
// anchors via L2 rounded-average:
|
||||
//
|
||||
// mc11[r,c] = avg(mc20(r, c),
|
||||
// mc02(r, c))
|
||||
//
|
||||
// Per-lane structure: each lane computes BOTH anchor outputs at its
|
||||
// own (r, c) target offset, then L2 averages. No shared memory.
|
||||
// Same WG geometry as the other qpel shaders.
|
||||
//
|
||||
// License: BSD-2-Clause.
|
||||
|
||||
#version 450
|
||||
#extension GL_EXT_shader_8bit_storage : require
|
||||
#extension GL_EXT_shader_explicit_arithmetic_types : require
|
||||
|
||||
layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in;
|
||||
layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src;
|
||||
layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst;
|
||||
layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta;
|
||||
layout(push_constant) uniform PC { uint n_blocks, stride_u8, _p0, _p1; } pc;
|
||||
|
||||
int hpel_h(uint src_off, uint stride, uint r, uint c) {
|
||||
uint row_base = src_off + r * stride + c;
|
||||
int s_m2 = int(u_src.src[row_base - 2u]);
|
||||
int s_m1 = int(u_src.src[row_base - 1u]);
|
||||
int s_0 = int(u_src.src[row_base ]);
|
||||
int s_p1 = int(u_src.src[row_base + 1u]);
|
||||
int s_p2 = int(u_src.src[row_base + 2u]);
|
||||
int s_p3 = int(u_src.src[row_base + 3u]);
|
||||
int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16;
|
||||
return clamp(v >> 5, 0, 255);
|
||||
}
|
||||
|
||||
int hpel_v(uint src_off, uint stride, uint r, uint c) {
|
||||
uint col_base = src_off + c;
|
||||
int s_m2 = int(u_src.src[col_base + (r - 2u) * stride]);
|
||||
int s_m1 = int(u_src.src[col_base + (r - 1u) * stride]);
|
||||
int s_0 = int(u_src.src[col_base + r * stride]);
|
||||
int s_p1 = int(u_src.src[col_base + (r + 1u) * stride]);
|
||||
int s_p2 = int(u_src.src[col_base + (r + 2u) * stride]);
|
||||
int s_p3 = int(u_src.src[col_base + (r + 3u) * stride]);
|
||||
int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16;
|
||||
return clamp(v >> 5, 0, 255);
|
||||
}
|
||||
|
||||
int hpel_hv_row(uint src_off, uint stride, uint rr, uint c) {
|
||||
// Single row's int16 horizontal lowpass (NOT clipped — used as
|
||||
// intermediate for the vertical pass of hpel_hv).
|
||||
uint row_base = src_off + rr * stride + c;
|
||||
int s_m2 = int(u_src.src[row_base - 2u]);
|
||||
int s_m1 = int(u_src.src[row_base - 1u]);
|
||||
int s_0 = int(u_src.src[row_base ]);
|
||||
int s_p1 = int(u_src.src[row_base + 1u]);
|
||||
int s_p2 = int(u_src.src[row_base + 2u]);
|
||||
int s_p3 = int(u_src.src[row_base + 3u]);
|
||||
return s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3;
|
||||
}
|
||||
|
||||
int hpel_hv(uint src_off, uint stride, uint r, uint c) {
|
||||
int t0 = hpel_hv_row(src_off, stride, r - 2u, c);
|
||||
int t1 = hpel_hv_row(src_off, stride, r - 1u, c);
|
||||
int t2 = hpel_hv_row(src_off, stride, r, c);
|
||||
int t3 = hpel_hv_row(src_off, stride, r + 1u, c);
|
||||
int t4 = hpel_hv_row(src_off, stride, r + 2u, c);
|
||||
int t5 = hpel_hv_row(src_off, stride, r + 3u, c);
|
||||
int v = t0 - 5*t1 + 20*t2 + 20*t3 - 5*t4 + t5 + 512;
|
||||
return clamp(v >> 10, 0, 255);
|
||||
}
|
||||
|
||||
void main()
|
||||
{
|
||||
uint block_idx = gl_WorkGroupID.x;
|
||||
if (block_idx >= pc.n_blocks) return;
|
||||
|
||||
uint lane = gl_LocalInvocationID.x;
|
||||
uint r = lane >> 3, c = lane & 7u;
|
||||
|
||||
uint dst_off = u_meta.meta[block_idx].x;
|
||||
uint src_off = u_meta.meta[block_idx].y;
|
||||
uint stride = pc.stride_u8;
|
||||
|
||||
int a = hpel_h(src_off, stride, r, c);
|
||||
int b = hpel_v(src_off, stride, r, c);
|
||||
int avg = (a + b + 1) >> 1;
|
||||
u_dst.dst[dst_off + r * stride + c] = uint8_t(avg);
|
||||
}
|
||||
@@ -0,0 +1,88 @@
|
||||
// daedalus-fourier — H.264 luma qpel mc12 (8x8, diagonal quarter-pel),
|
||||
// V3D 7.1. Per H.264 §8.4.2.2.1 (table 8-4) — composes two half-pel
|
||||
// anchors via L2 rounded-average:
|
||||
//
|
||||
// mc12[r,c] = avg(mc22(r, c),
|
||||
// mc02(r, c))
|
||||
//
|
||||
// Per-lane structure: each lane computes BOTH anchor outputs at its
|
||||
// own (r, c) target offset, then L2 averages. No shared memory.
|
||||
// Same WG geometry as the other qpel shaders.
|
||||
//
|
||||
// License: BSD-2-Clause.
|
||||
|
||||
#version 450
|
||||
#extension GL_EXT_shader_8bit_storage : require
|
||||
#extension GL_EXT_shader_explicit_arithmetic_types : require
|
||||
|
||||
layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in;
|
||||
layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src;
|
||||
layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst;
|
||||
layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta;
|
||||
layout(push_constant) uniform PC { uint n_blocks, stride_u8, _p0, _p1; } pc;
|
||||
|
||||
int hpel_h(uint src_off, uint stride, uint r, uint c) {
|
||||
uint row_base = src_off + r * stride + c;
|
||||
int s_m2 = int(u_src.src[row_base - 2u]);
|
||||
int s_m1 = int(u_src.src[row_base - 1u]);
|
||||
int s_0 = int(u_src.src[row_base ]);
|
||||
int s_p1 = int(u_src.src[row_base + 1u]);
|
||||
int s_p2 = int(u_src.src[row_base + 2u]);
|
||||
int s_p3 = int(u_src.src[row_base + 3u]);
|
||||
int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16;
|
||||
return clamp(v >> 5, 0, 255);
|
||||
}
|
||||
|
||||
int hpel_v(uint src_off, uint stride, uint r, uint c) {
|
||||
uint col_base = src_off + c;
|
||||
int s_m2 = int(u_src.src[col_base + (r - 2u) * stride]);
|
||||
int s_m1 = int(u_src.src[col_base + (r - 1u) * stride]);
|
||||
int s_0 = int(u_src.src[col_base + r * stride]);
|
||||
int s_p1 = int(u_src.src[col_base + (r + 1u) * stride]);
|
||||
int s_p2 = int(u_src.src[col_base + (r + 2u) * stride]);
|
||||
int s_p3 = int(u_src.src[col_base + (r + 3u) * stride]);
|
||||
int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16;
|
||||
return clamp(v >> 5, 0, 255);
|
||||
}
|
||||
|
||||
int hpel_hv_row(uint src_off, uint stride, uint rr, uint c) {
|
||||
// Single row's int16 horizontal lowpass (NOT clipped — used as
|
||||
// intermediate for the vertical pass of hpel_hv).
|
||||
uint row_base = src_off + rr * stride + c;
|
||||
int s_m2 = int(u_src.src[row_base - 2u]);
|
||||
int s_m1 = int(u_src.src[row_base - 1u]);
|
||||
int s_0 = int(u_src.src[row_base ]);
|
||||
int s_p1 = int(u_src.src[row_base + 1u]);
|
||||
int s_p2 = int(u_src.src[row_base + 2u]);
|
||||
int s_p3 = int(u_src.src[row_base + 3u]);
|
||||
return s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3;
|
||||
}
|
||||
|
||||
int hpel_hv(uint src_off, uint stride, uint r, uint c) {
|
||||
int t0 = hpel_hv_row(src_off, stride, r - 2u, c);
|
||||
int t1 = hpel_hv_row(src_off, stride, r - 1u, c);
|
||||
int t2 = hpel_hv_row(src_off, stride, r, c);
|
||||
int t3 = hpel_hv_row(src_off, stride, r + 1u, c);
|
||||
int t4 = hpel_hv_row(src_off, stride, r + 2u, c);
|
||||
int t5 = hpel_hv_row(src_off, stride, r + 3u, c);
|
||||
int v = t0 - 5*t1 + 20*t2 + 20*t3 - 5*t4 + t5 + 512;
|
||||
return clamp(v >> 10, 0, 255);
|
||||
}
|
||||
|
||||
void main()
|
||||
{
|
||||
uint block_idx = gl_WorkGroupID.x;
|
||||
if (block_idx >= pc.n_blocks) return;
|
||||
|
||||
uint lane = gl_LocalInvocationID.x;
|
||||
uint r = lane >> 3, c = lane & 7u;
|
||||
|
||||
uint dst_off = u_meta.meta[block_idx].x;
|
||||
uint src_off = u_meta.meta[block_idx].y;
|
||||
uint stride = pc.stride_u8;
|
||||
|
||||
int a = hpel_hv(src_off, stride, r, c);
|
||||
int b = hpel_v(src_off, stride, r, c);
|
||||
int avg = (a + b + 1) >> 1;
|
||||
u_dst.dst[dst_off + r * stride + c] = uint8_t(avg);
|
||||
}
|
||||
@@ -0,0 +1,88 @@
|
||||
// daedalus-fourier — H.264 luma qpel mc13 (8x8, diagonal quarter-pel),
|
||||
// V3D 7.1. Per H.264 §8.4.2.2.1 (table 8-4) — composes two half-pel
|
||||
// anchors via L2 rounded-average:
|
||||
//
|
||||
// mc13[r,c] = avg(mc20(r+1, c),
|
||||
// mc02(r, c))
|
||||
//
|
||||
// Per-lane structure: each lane computes BOTH anchor outputs at its
|
||||
// own (r, c) target offset, then L2 averages. No shared memory.
|
||||
// Same WG geometry as the other qpel shaders.
|
||||
//
|
||||
// License: BSD-2-Clause.
|
||||
|
||||
#version 450
|
||||
#extension GL_EXT_shader_8bit_storage : require
|
||||
#extension GL_EXT_shader_explicit_arithmetic_types : require
|
||||
|
||||
layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in;
|
||||
layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src;
|
||||
layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst;
|
||||
layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta;
|
||||
layout(push_constant) uniform PC { uint n_blocks, stride_u8, _p0, _p1; } pc;
|
||||
|
||||
int hpel_h(uint src_off, uint stride, uint r, uint c) {
|
||||
uint row_base = src_off + r * stride + c;
|
||||
int s_m2 = int(u_src.src[row_base - 2u]);
|
||||
int s_m1 = int(u_src.src[row_base - 1u]);
|
||||
int s_0 = int(u_src.src[row_base ]);
|
||||
int s_p1 = int(u_src.src[row_base + 1u]);
|
||||
int s_p2 = int(u_src.src[row_base + 2u]);
|
||||
int s_p3 = int(u_src.src[row_base + 3u]);
|
||||
int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16;
|
||||
return clamp(v >> 5, 0, 255);
|
||||
}
|
||||
|
||||
int hpel_v(uint src_off, uint stride, uint r, uint c) {
|
||||
uint col_base = src_off + c;
|
||||
int s_m2 = int(u_src.src[col_base + (r - 2u) * stride]);
|
||||
int s_m1 = int(u_src.src[col_base + (r - 1u) * stride]);
|
||||
int s_0 = int(u_src.src[col_base + r * stride]);
|
||||
int s_p1 = int(u_src.src[col_base + (r + 1u) * stride]);
|
||||
int s_p2 = int(u_src.src[col_base + (r + 2u) * stride]);
|
||||
int s_p3 = int(u_src.src[col_base + (r + 3u) * stride]);
|
||||
int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16;
|
||||
return clamp(v >> 5, 0, 255);
|
||||
}
|
||||
|
||||
int hpel_hv_row(uint src_off, uint stride, uint rr, uint c) {
|
||||
// Single row's int16 horizontal lowpass (NOT clipped — used as
|
||||
// intermediate for the vertical pass of hpel_hv).
|
||||
uint row_base = src_off + rr * stride + c;
|
||||
int s_m2 = int(u_src.src[row_base - 2u]);
|
||||
int s_m1 = int(u_src.src[row_base - 1u]);
|
||||
int s_0 = int(u_src.src[row_base ]);
|
||||
int s_p1 = int(u_src.src[row_base + 1u]);
|
||||
int s_p2 = int(u_src.src[row_base + 2u]);
|
||||
int s_p3 = int(u_src.src[row_base + 3u]);
|
||||
return s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3;
|
||||
}
|
||||
|
||||
int hpel_hv(uint src_off, uint stride, uint r, uint c) {
|
||||
int t0 = hpel_hv_row(src_off, stride, r - 2u, c);
|
||||
int t1 = hpel_hv_row(src_off, stride, r - 1u, c);
|
||||
int t2 = hpel_hv_row(src_off, stride, r, c);
|
||||
int t3 = hpel_hv_row(src_off, stride, r + 1u, c);
|
||||
int t4 = hpel_hv_row(src_off, stride, r + 2u, c);
|
||||
int t5 = hpel_hv_row(src_off, stride, r + 3u, c);
|
||||
int v = t0 - 5*t1 + 20*t2 + 20*t3 - 5*t4 + t5 + 512;
|
||||
return clamp(v >> 10, 0, 255);
|
||||
}
|
||||
|
||||
void main()
|
||||
{
|
||||
uint block_idx = gl_WorkGroupID.x;
|
||||
if (block_idx >= pc.n_blocks) return;
|
||||
|
||||
uint lane = gl_LocalInvocationID.x;
|
||||
uint r = lane >> 3, c = lane & 7u;
|
||||
|
||||
uint dst_off = u_meta.meta[block_idx].x;
|
||||
uint src_off = u_meta.meta[block_idx].y;
|
||||
uint stride = pc.stride_u8;
|
||||
|
||||
int a = hpel_h(src_off, stride, r+1u, c);
|
||||
int b = hpel_v(src_off, stride, r, c);
|
||||
int avg = (a + b + 1) >> 1;
|
||||
u_dst.dst[dst_off + r * stride + c] = uint8_t(avg);
|
||||
}
|
||||
@@ -0,0 +1,88 @@
|
||||
// daedalus-fourier — H.264 luma qpel mc21 (8x8, diagonal quarter-pel),
|
||||
// V3D 7.1. Per H.264 §8.4.2.2.1 (table 8-4) — composes two half-pel
|
||||
// anchors via L2 rounded-average:
|
||||
//
|
||||
// mc21[r,c] = avg(mc22(r, c),
|
||||
// mc20(r, c))
|
||||
//
|
||||
// Per-lane structure: each lane computes BOTH anchor outputs at its
|
||||
// own (r, c) target offset, then L2 averages. No shared memory.
|
||||
// Same WG geometry as the other qpel shaders.
|
||||
//
|
||||
// License: BSD-2-Clause.
|
||||
|
||||
#version 450
|
||||
#extension GL_EXT_shader_8bit_storage : require
|
||||
#extension GL_EXT_shader_explicit_arithmetic_types : require
|
||||
|
||||
layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in;
|
||||
layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src;
|
||||
layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst;
|
||||
layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta;
|
||||
layout(push_constant) uniform PC { uint n_blocks, stride_u8, _p0, _p1; } pc;
|
||||
|
||||
int hpel_h(uint src_off, uint stride, uint r, uint c) {
|
||||
uint row_base = src_off + r * stride + c;
|
||||
int s_m2 = int(u_src.src[row_base - 2u]);
|
||||
int s_m1 = int(u_src.src[row_base - 1u]);
|
||||
int s_0 = int(u_src.src[row_base ]);
|
||||
int s_p1 = int(u_src.src[row_base + 1u]);
|
||||
int s_p2 = int(u_src.src[row_base + 2u]);
|
||||
int s_p3 = int(u_src.src[row_base + 3u]);
|
||||
int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16;
|
||||
return clamp(v >> 5, 0, 255);
|
||||
}
|
||||
|
||||
int hpel_v(uint src_off, uint stride, uint r, uint c) {
|
||||
uint col_base = src_off + c;
|
||||
int s_m2 = int(u_src.src[col_base + (r - 2u) * stride]);
|
||||
int s_m1 = int(u_src.src[col_base + (r - 1u) * stride]);
|
||||
int s_0 = int(u_src.src[col_base + r * stride]);
|
||||
int s_p1 = int(u_src.src[col_base + (r + 1u) * stride]);
|
||||
int s_p2 = int(u_src.src[col_base + (r + 2u) * stride]);
|
||||
int s_p3 = int(u_src.src[col_base + (r + 3u) * stride]);
|
||||
int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16;
|
||||
return clamp(v >> 5, 0, 255);
|
||||
}
|
||||
|
||||
int hpel_hv_row(uint src_off, uint stride, uint rr, uint c) {
|
||||
// Single row's int16 horizontal lowpass (NOT clipped — used as
|
||||
// intermediate for the vertical pass of hpel_hv).
|
||||
uint row_base = src_off + rr * stride + c;
|
||||
int s_m2 = int(u_src.src[row_base - 2u]);
|
||||
int s_m1 = int(u_src.src[row_base - 1u]);
|
||||
int s_0 = int(u_src.src[row_base ]);
|
||||
int s_p1 = int(u_src.src[row_base + 1u]);
|
||||
int s_p2 = int(u_src.src[row_base + 2u]);
|
||||
int s_p3 = int(u_src.src[row_base + 3u]);
|
||||
return s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3;
|
||||
}
|
||||
|
||||
int hpel_hv(uint src_off, uint stride, uint r, uint c) {
|
||||
int t0 = hpel_hv_row(src_off, stride, r - 2u, c);
|
||||
int t1 = hpel_hv_row(src_off, stride, r - 1u, c);
|
||||
int t2 = hpel_hv_row(src_off, stride, r, c);
|
||||
int t3 = hpel_hv_row(src_off, stride, r + 1u, c);
|
||||
int t4 = hpel_hv_row(src_off, stride, r + 2u, c);
|
||||
int t5 = hpel_hv_row(src_off, stride, r + 3u, c);
|
||||
int v = t0 - 5*t1 + 20*t2 + 20*t3 - 5*t4 + t5 + 512;
|
||||
return clamp(v >> 10, 0, 255);
|
||||
}
|
||||
|
||||
void main()
|
||||
{
|
||||
uint block_idx = gl_WorkGroupID.x;
|
||||
if (block_idx >= pc.n_blocks) return;
|
||||
|
||||
uint lane = gl_LocalInvocationID.x;
|
||||
uint r = lane >> 3, c = lane & 7u;
|
||||
|
||||
uint dst_off = u_meta.meta[block_idx].x;
|
||||
uint src_off = u_meta.meta[block_idx].y;
|
||||
uint stride = pc.stride_u8;
|
||||
|
||||
int a = hpel_hv(src_off, stride, r, c);
|
||||
int b = hpel_h(src_off, stride, r, c);
|
||||
int avg = (a + b + 1) >> 1;
|
||||
u_dst.dst[dst_off + r * stride + c] = uint8_t(avg);
|
||||
}
|
||||
@@ -0,0 +1,88 @@
|
||||
// daedalus-fourier — H.264 luma qpel mc23 (8x8, diagonal quarter-pel),
|
||||
// V3D 7.1. Per H.264 §8.4.2.2.1 (table 8-4) — composes two half-pel
|
||||
// anchors via L2 rounded-average:
|
||||
//
|
||||
// mc23[r,c] = avg(mc22(r, c),
|
||||
// mc20(r+1, c))
|
||||
//
|
||||
// Per-lane structure: each lane computes BOTH anchor outputs at its
|
||||
// own (r, c) target offset, then L2 averages. No shared memory.
|
||||
// Same WG geometry as the other qpel shaders.
|
||||
//
|
||||
// License: BSD-2-Clause.
|
||||
|
||||
#version 450
|
||||
#extension GL_EXT_shader_8bit_storage : require
|
||||
#extension GL_EXT_shader_explicit_arithmetic_types : require
|
||||
|
||||
layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in;
|
||||
layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src;
|
||||
layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst;
|
||||
layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta;
|
||||
layout(push_constant) uniform PC { uint n_blocks, stride_u8, _p0, _p1; } pc;
|
||||
|
||||
int hpel_h(uint src_off, uint stride, uint r, uint c) {
|
||||
uint row_base = src_off + r * stride + c;
|
||||
int s_m2 = int(u_src.src[row_base - 2u]);
|
||||
int s_m1 = int(u_src.src[row_base - 1u]);
|
||||
int s_0 = int(u_src.src[row_base ]);
|
||||
int s_p1 = int(u_src.src[row_base + 1u]);
|
||||
int s_p2 = int(u_src.src[row_base + 2u]);
|
||||
int s_p3 = int(u_src.src[row_base + 3u]);
|
||||
int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16;
|
||||
return clamp(v >> 5, 0, 255);
|
||||
}
|
||||
|
||||
int hpel_v(uint src_off, uint stride, uint r, uint c) {
|
||||
uint col_base = src_off + c;
|
||||
int s_m2 = int(u_src.src[col_base + (r - 2u) * stride]);
|
||||
int s_m1 = int(u_src.src[col_base + (r - 1u) * stride]);
|
||||
int s_0 = int(u_src.src[col_base + r * stride]);
|
||||
int s_p1 = int(u_src.src[col_base + (r + 1u) * stride]);
|
||||
int s_p2 = int(u_src.src[col_base + (r + 2u) * stride]);
|
||||
int s_p3 = int(u_src.src[col_base + (r + 3u) * stride]);
|
||||
int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16;
|
||||
return clamp(v >> 5, 0, 255);
|
||||
}
|
||||
|
||||
int hpel_hv_row(uint src_off, uint stride, uint rr, uint c) {
|
||||
// Single row's int16 horizontal lowpass (NOT clipped — used as
|
||||
// intermediate for the vertical pass of hpel_hv).
|
||||
uint row_base = src_off + rr * stride + c;
|
||||
int s_m2 = int(u_src.src[row_base - 2u]);
|
||||
int s_m1 = int(u_src.src[row_base - 1u]);
|
||||
int s_0 = int(u_src.src[row_base ]);
|
||||
int s_p1 = int(u_src.src[row_base + 1u]);
|
||||
int s_p2 = int(u_src.src[row_base + 2u]);
|
||||
int s_p3 = int(u_src.src[row_base + 3u]);
|
||||
return s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3;
|
||||
}
|
||||
|
||||
int hpel_hv(uint src_off, uint stride, uint r, uint c) {
|
||||
int t0 = hpel_hv_row(src_off, stride, r - 2u, c);
|
||||
int t1 = hpel_hv_row(src_off, stride, r - 1u, c);
|
||||
int t2 = hpel_hv_row(src_off, stride, r, c);
|
||||
int t3 = hpel_hv_row(src_off, stride, r + 1u, c);
|
||||
int t4 = hpel_hv_row(src_off, stride, r + 2u, c);
|
||||
int t5 = hpel_hv_row(src_off, stride, r + 3u, c);
|
||||
int v = t0 - 5*t1 + 20*t2 + 20*t3 - 5*t4 + t5 + 512;
|
||||
return clamp(v >> 10, 0, 255);
|
||||
}
|
||||
|
||||
void main()
|
||||
{
|
||||
uint block_idx = gl_WorkGroupID.x;
|
||||
if (block_idx >= pc.n_blocks) return;
|
||||
|
||||
uint lane = gl_LocalInvocationID.x;
|
||||
uint r = lane >> 3, c = lane & 7u;
|
||||
|
||||
uint dst_off = u_meta.meta[block_idx].x;
|
||||
uint src_off = u_meta.meta[block_idx].y;
|
||||
uint stride = pc.stride_u8;
|
||||
|
||||
int a = hpel_hv(src_off, stride, r, c);
|
||||
int b = hpel_h(src_off, stride, r+1u, c);
|
||||
int avg = (a + b + 1) >> 1;
|
||||
u_dst.dst[dst_off + r * stride + c] = uint8_t(avg);
|
||||
}
|
||||
@@ -0,0 +1,88 @@
|
||||
// daedalus-fourier — H.264 luma qpel mc31 (8x8, diagonal quarter-pel),
|
||||
// V3D 7.1. Per H.264 §8.4.2.2.1 (table 8-4) — composes two half-pel
|
||||
// anchors via L2 rounded-average:
|
||||
//
|
||||
// mc31[r,c] = avg(mc20(r, c),
|
||||
// mc02(r, c+1))
|
||||
//
|
||||
// Per-lane structure: each lane computes BOTH anchor outputs at its
|
||||
// own (r, c) target offset, then L2 averages. No shared memory.
|
||||
// Same WG geometry as the other qpel shaders.
|
||||
//
|
||||
// License: BSD-2-Clause.
|
||||
|
||||
#version 450
|
||||
#extension GL_EXT_shader_8bit_storage : require
|
||||
#extension GL_EXT_shader_explicit_arithmetic_types : require
|
||||
|
||||
layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in;
|
||||
layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src;
|
||||
layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst;
|
||||
layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta;
|
||||
layout(push_constant) uniform PC { uint n_blocks, stride_u8, _p0, _p1; } pc;
|
||||
|
||||
int hpel_h(uint src_off, uint stride, uint r, uint c) {
|
||||
uint row_base = src_off + r * stride + c;
|
||||
int s_m2 = int(u_src.src[row_base - 2u]);
|
||||
int s_m1 = int(u_src.src[row_base - 1u]);
|
||||
int s_0 = int(u_src.src[row_base ]);
|
||||
int s_p1 = int(u_src.src[row_base + 1u]);
|
||||
int s_p2 = int(u_src.src[row_base + 2u]);
|
||||
int s_p3 = int(u_src.src[row_base + 3u]);
|
||||
int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16;
|
||||
return clamp(v >> 5, 0, 255);
|
||||
}
|
||||
|
||||
int hpel_v(uint src_off, uint stride, uint r, uint c) {
|
||||
uint col_base = src_off + c;
|
||||
int s_m2 = int(u_src.src[col_base + (r - 2u) * stride]);
|
||||
int s_m1 = int(u_src.src[col_base + (r - 1u) * stride]);
|
||||
int s_0 = int(u_src.src[col_base + r * stride]);
|
||||
int s_p1 = int(u_src.src[col_base + (r + 1u) * stride]);
|
||||
int s_p2 = int(u_src.src[col_base + (r + 2u) * stride]);
|
||||
int s_p3 = int(u_src.src[col_base + (r + 3u) * stride]);
|
||||
int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16;
|
||||
return clamp(v >> 5, 0, 255);
|
||||
}
|
||||
|
||||
int hpel_hv_row(uint src_off, uint stride, uint rr, uint c) {
|
||||
// Single row's int16 horizontal lowpass (NOT clipped — used as
|
||||
// intermediate for the vertical pass of hpel_hv).
|
||||
uint row_base = src_off + rr * stride + c;
|
||||
int s_m2 = int(u_src.src[row_base - 2u]);
|
||||
int s_m1 = int(u_src.src[row_base - 1u]);
|
||||
int s_0 = int(u_src.src[row_base ]);
|
||||
int s_p1 = int(u_src.src[row_base + 1u]);
|
||||
int s_p2 = int(u_src.src[row_base + 2u]);
|
||||
int s_p3 = int(u_src.src[row_base + 3u]);
|
||||
return s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3;
|
||||
}
|
||||
|
||||
int hpel_hv(uint src_off, uint stride, uint r, uint c) {
|
||||
int t0 = hpel_hv_row(src_off, stride, r - 2u, c);
|
||||
int t1 = hpel_hv_row(src_off, stride, r - 1u, c);
|
||||
int t2 = hpel_hv_row(src_off, stride, r, c);
|
||||
int t3 = hpel_hv_row(src_off, stride, r + 1u, c);
|
||||
int t4 = hpel_hv_row(src_off, stride, r + 2u, c);
|
||||
int t5 = hpel_hv_row(src_off, stride, r + 3u, c);
|
||||
int v = t0 - 5*t1 + 20*t2 + 20*t3 - 5*t4 + t5 + 512;
|
||||
return clamp(v >> 10, 0, 255);
|
||||
}
|
||||
|
||||
void main()
|
||||
{
|
||||
uint block_idx = gl_WorkGroupID.x;
|
||||
if (block_idx >= pc.n_blocks) return;
|
||||
|
||||
uint lane = gl_LocalInvocationID.x;
|
||||
uint r = lane >> 3, c = lane & 7u;
|
||||
|
||||
uint dst_off = u_meta.meta[block_idx].x;
|
||||
uint src_off = u_meta.meta[block_idx].y;
|
||||
uint stride = pc.stride_u8;
|
||||
|
||||
int a = hpel_h(src_off, stride, r, c);
|
||||
int b = hpel_v(src_off, stride, r, c+1u);
|
||||
int avg = (a + b + 1) >> 1;
|
||||
u_dst.dst[dst_off + r * stride + c] = uint8_t(avg);
|
||||
}
|
||||
@@ -0,0 +1,88 @@
|
||||
// daedalus-fourier — H.264 luma qpel mc32 (8x8, diagonal quarter-pel),
|
||||
// V3D 7.1. Per H.264 §8.4.2.2.1 (table 8-4) — composes two half-pel
|
||||
// anchors via L2 rounded-average:
|
||||
//
|
||||
// mc32[r,c] = avg(mc22(r, c),
|
||||
// mc02(r, c+1))
|
||||
//
|
||||
// Per-lane structure: each lane computes BOTH anchor outputs at its
|
||||
// own (r, c) target offset, then L2 averages. No shared memory.
|
||||
// Same WG geometry as the other qpel shaders.
|
||||
//
|
||||
// License: BSD-2-Clause.
|
||||
|
||||
#version 450
|
||||
#extension GL_EXT_shader_8bit_storage : require
|
||||
#extension GL_EXT_shader_explicit_arithmetic_types : require
|
||||
|
||||
layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in;
|
||||
layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src;
|
||||
layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst;
|
||||
layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta;
|
||||
layout(push_constant) uniform PC { uint n_blocks, stride_u8, _p0, _p1; } pc;
|
||||
|
||||
int hpel_h(uint src_off, uint stride, uint r, uint c) {
|
||||
uint row_base = src_off + r * stride + c;
|
||||
int s_m2 = int(u_src.src[row_base - 2u]);
|
||||
int s_m1 = int(u_src.src[row_base - 1u]);
|
||||
int s_0 = int(u_src.src[row_base ]);
|
||||
int s_p1 = int(u_src.src[row_base + 1u]);
|
||||
int s_p2 = int(u_src.src[row_base + 2u]);
|
||||
int s_p3 = int(u_src.src[row_base + 3u]);
|
||||
int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16;
|
||||
return clamp(v >> 5, 0, 255);
|
||||
}
|
||||
|
||||
int hpel_v(uint src_off, uint stride, uint r, uint c) {
|
||||
uint col_base = src_off + c;
|
||||
int s_m2 = int(u_src.src[col_base + (r - 2u) * stride]);
|
||||
int s_m1 = int(u_src.src[col_base + (r - 1u) * stride]);
|
||||
int s_0 = int(u_src.src[col_base + r * stride]);
|
||||
int s_p1 = int(u_src.src[col_base + (r + 1u) * stride]);
|
||||
int s_p2 = int(u_src.src[col_base + (r + 2u) * stride]);
|
||||
int s_p3 = int(u_src.src[col_base + (r + 3u) * stride]);
|
||||
int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16;
|
||||
return clamp(v >> 5, 0, 255);
|
||||
}
|
||||
|
||||
int hpel_hv_row(uint src_off, uint stride, uint rr, uint c) {
|
||||
// Single row's int16 horizontal lowpass (NOT clipped — used as
|
||||
// intermediate for the vertical pass of hpel_hv).
|
||||
uint row_base = src_off + rr * stride + c;
|
||||
int s_m2 = int(u_src.src[row_base - 2u]);
|
||||
int s_m1 = int(u_src.src[row_base - 1u]);
|
||||
int s_0 = int(u_src.src[row_base ]);
|
||||
int s_p1 = int(u_src.src[row_base + 1u]);
|
||||
int s_p2 = int(u_src.src[row_base + 2u]);
|
||||
int s_p3 = int(u_src.src[row_base + 3u]);
|
||||
return s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3;
|
||||
}
|
||||
|
||||
int hpel_hv(uint src_off, uint stride, uint r, uint c) {
|
||||
int t0 = hpel_hv_row(src_off, stride, r - 2u, c);
|
||||
int t1 = hpel_hv_row(src_off, stride, r - 1u, c);
|
||||
int t2 = hpel_hv_row(src_off, stride, r, c);
|
||||
int t3 = hpel_hv_row(src_off, stride, r + 1u, c);
|
||||
int t4 = hpel_hv_row(src_off, stride, r + 2u, c);
|
||||
int t5 = hpel_hv_row(src_off, stride, r + 3u, c);
|
||||
int v = t0 - 5*t1 + 20*t2 + 20*t3 - 5*t4 + t5 + 512;
|
||||
return clamp(v >> 10, 0, 255);
|
||||
}
|
||||
|
||||
void main()
|
||||
{
|
||||
uint block_idx = gl_WorkGroupID.x;
|
||||
if (block_idx >= pc.n_blocks) return;
|
||||
|
||||
uint lane = gl_LocalInvocationID.x;
|
||||
uint r = lane >> 3, c = lane & 7u;
|
||||
|
||||
uint dst_off = u_meta.meta[block_idx].x;
|
||||
uint src_off = u_meta.meta[block_idx].y;
|
||||
uint stride = pc.stride_u8;
|
||||
|
||||
int a = hpel_hv(src_off, stride, r, c);
|
||||
int b = hpel_v(src_off, stride, r, c+1u);
|
||||
int avg = (a + b + 1) >> 1;
|
||||
u_dst.dst[dst_off + r * stride + c] = uint8_t(avg);
|
||||
}
|
||||
@@ -0,0 +1,88 @@
|
||||
// daedalus-fourier — H.264 luma qpel mc33 (8x8, diagonal quarter-pel),
|
||||
// V3D 7.1. Per H.264 §8.4.2.2.1 (table 8-4) — composes two half-pel
|
||||
// anchors via L2 rounded-average:
|
||||
//
|
||||
// mc33[r,c] = avg(mc20(r+1, c),
|
||||
// mc02(r, c+1))
|
||||
//
|
||||
// Per-lane structure: each lane computes BOTH anchor outputs at its
|
||||
// own (r, c) target offset, then L2 averages. No shared memory.
|
||||
// Same WG geometry as the other qpel shaders.
|
||||
//
|
||||
// License: BSD-2-Clause.
|
||||
|
||||
#version 450
|
||||
#extension GL_EXT_shader_8bit_storage : require
|
||||
#extension GL_EXT_shader_explicit_arithmetic_types : require
|
||||
|
||||
layout(local_size_x = 64, local_size_y = 1, local_size_z = 1) in;
|
||||
layout(binding = 0) readonly buffer Src { uint8_t src[]; } u_src;
|
||||
layout(binding = 1) buffer Dst { uint8_t dst[]; } u_dst;
|
||||
layout(binding = 2) readonly buffer Meta { uvec4 meta[]; } u_meta;
|
||||
layout(push_constant) uniform PC { uint n_blocks, stride_u8, _p0, _p1; } pc;
|
||||
|
||||
int hpel_h(uint src_off, uint stride, uint r, uint c) {
|
||||
uint row_base = src_off + r * stride + c;
|
||||
int s_m2 = int(u_src.src[row_base - 2u]);
|
||||
int s_m1 = int(u_src.src[row_base - 1u]);
|
||||
int s_0 = int(u_src.src[row_base ]);
|
||||
int s_p1 = int(u_src.src[row_base + 1u]);
|
||||
int s_p2 = int(u_src.src[row_base + 2u]);
|
||||
int s_p3 = int(u_src.src[row_base + 3u]);
|
||||
int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16;
|
||||
return clamp(v >> 5, 0, 255);
|
||||
}
|
||||
|
||||
int hpel_v(uint src_off, uint stride, uint r, uint c) {
|
||||
uint col_base = src_off + c;
|
||||
int s_m2 = int(u_src.src[col_base + (r - 2u) * stride]);
|
||||
int s_m1 = int(u_src.src[col_base + (r - 1u) * stride]);
|
||||
int s_0 = int(u_src.src[col_base + r * stride]);
|
||||
int s_p1 = int(u_src.src[col_base + (r + 1u) * stride]);
|
||||
int s_p2 = int(u_src.src[col_base + (r + 2u) * stride]);
|
||||
int s_p3 = int(u_src.src[col_base + (r + 3u) * stride]);
|
||||
int v = s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3 + 16;
|
||||
return clamp(v >> 5, 0, 255);
|
||||
}
|
||||
|
||||
int hpel_hv_row(uint src_off, uint stride, uint rr, uint c) {
|
||||
// Single row's int16 horizontal lowpass (NOT clipped — used as
|
||||
// intermediate for the vertical pass of hpel_hv).
|
||||
uint row_base = src_off + rr * stride + c;
|
||||
int s_m2 = int(u_src.src[row_base - 2u]);
|
||||
int s_m1 = int(u_src.src[row_base - 1u]);
|
||||
int s_0 = int(u_src.src[row_base ]);
|
||||
int s_p1 = int(u_src.src[row_base + 1u]);
|
||||
int s_p2 = int(u_src.src[row_base + 2u]);
|
||||
int s_p3 = int(u_src.src[row_base + 3u]);
|
||||
return s_m2 - 5*s_m1 + 20*s_0 + 20*s_p1 - 5*s_p2 + s_p3;
|
||||
}
|
||||
|
||||
int hpel_hv(uint src_off, uint stride, uint r, uint c) {
|
||||
int t0 = hpel_hv_row(src_off, stride, r - 2u, c);
|
||||
int t1 = hpel_hv_row(src_off, stride, r - 1u, c);
|
||||
int t2 = hpel_hv_row(src_off, stride, r, c);
|
||||
int t3 = hpel_hv_row(src_off, stride, r + 1u, c);
|
||||
int t4 = hpel_hv_row(src_off, stride, r + 2u, c);
|
||||
int t5 = hpel_hv_row(src_off, stride, r + 3u, c);
|
||||
int v = t0 - 5*t1 + 20*t2 + 20*t3 - 5*t4 + t5 + 512;
|
||||
return clamp(v >> 10, 0, 255);
|
||||
}
|
||||
|
||||
void main()
|
||||
{
|
||||
uint block_idx = gl_WorkGroupID.x;
|
||||
if (block_idx >= pc.n_blocks) return;
|
||||
|
||||
uint lane = gl_LocalInvocationID.x;
|
||||
uint r = lane >> 3, c = lane & 7u;
|
||||
|
||||
uint dst_off = u_meta.meta[block_idx].x;
|
||||
uint src_off = u_meta.meta[block_idx].y;
|
||||
uint stride = pc.stride_u8;
|
||||
|
||||
int a = hpel_h(src_off, stride, r+1u, c);
|
||||
int b = hpel_v(src_off, stride, r, c+1u);
|
||||
int avg = (a + b + 1) >> 1;
|
||||
u_dst.dst[dst_off + r * stride + c] = uint8_t(avg);
|
||||
}
|
||||
Reference in New Issue
Block a user