marfrit
f510ac6be5
Mid-Phase-7 fix-forward landed on fork (marfrit/libva-multiplanar:692eaa0): unconditional context_object->h264_start_code = true was prepending 0x00 0x00 0x01 to VP9 slice data, shifting the rkvdec bitstream by 24 bits and producing silent decode failure. Now gated on config_object->profile (H.264 + HEVC only). Empirical verification when fresnel was online: post-fix VP9 keyframe FRAME control bytes 0-23 byte-match Phase 3 anchor: lf.flags=0x03 (DELTA_ENABLED|DELTA_UPDATE) — was 0x01 base_q_idx=0x2e=46 — was 0x41=65 This is the transitive-proof leg-1 (backend-payload == kernel-direct-payload) for the iter4 keyframe. Open verification when fresnel returns: - Full 168-byte FRAME control diff mine vs Phase 3 anchor - Full 2040-byte COMPRESSED_HDR control diff - ffmpeg-v4l2request kernel-direct VP9 decode + hwdownload pixels = Phase 3 SW reference (transitive-proof leg-2) If both legs PASS, iter4 closes 5/5 (4 direct from earlier iters + 1 transitive iter4) per Option-A choice. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
49 lines
2.7 KiB
Markdown
49 lines
2.7 KiB
Markdown
# iter4 Phase 7 status — paused (fresnel offline)
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## Where we paused
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After surfacing **3 distinct bug classes** in Phase 7 verification (criterion 4 + 5 fail), user picked **Option A** (VP9-only fix, criterion 4 transitive).
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Mid-fix, found that Bug 1 (Clause 6 parser bit-misalignment) had a deeper root cause:
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- `src/context.c:194` set `context_object->h264_start_code = true` unconditionally
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- `src/picture.c:70` therefore prepended `0x00 0x00 0x01` ANNEX-B start code to ALL slice data, including VP9
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- VP9 has no start codes → kernel rkvdec read garbage uncompressed_header → silent decode failure → CAPTURE buffer stayed at cap_pool init pattern (0x4c green)
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**Fix landed** in fork commit `692eaa0`: switch on `config_object->profile`; set `h264_start_code = true` only for VAProfileH264* and VAProfileHEVCMain.
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**Empirical verification when fresnel was online**: post-fix VP9 keyframe FRAME control bytes 0-23 byte-match Phase 3 anchor exactly.
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- pre-fix: lf.flags=0x01, base_q_idx=0x41 (bit-misaligned)
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- post-fix: lf.flags=0x03 (DELTA_ENABLED|DELTA_UPDATE), base_q_idx=0x2e=46 (matches anchor)
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**Open verification when fresnel returns**:
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1. Diff full FRAME control payload (all 168 bytes) mine vs Phase 3 anchor — confirm full byte-match (transitive proof leg 1).
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2. Diff full COMPRESSED_HDR control payload (2040 bytes) mine vs Phase 3 anchor — same.
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3. ffmpeg-v4l2request VP9 decode + hwdownload (kernel-direct path, NOT via libva): confirm pixels match Phase 3 SW reference (transitive proof leg 2).
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4. Both legs satisfied → criterion 4 transitive PASS.
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If transitive proof PASSES, iter4 closes with:
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- Criterion 1: PASS (vainfo)
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- Criterion 2: PASS (implicit)
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- Criterion 3: PASS (ffmpeg-vaapi exit 0)
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- Criterion 4: PASS-transitive (per iter3 precedent + memory `reference_dmabuf_resv_blocker.md`)
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- Criterion 5: still partial — Bug 2/3 are substrate-wide, NOT iter4 scope.
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Campaign scoreboard moves to 5/5 (4 direct from earlier iters + 1 transitive iter4).
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## Memory update
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Saved memory `feedback_unconditional_codec_state.md`: future codec-class-specific state MUST be gated on `config_object->profile`, not set unconditionally. iter1/iter3 had this latent bug too.
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## Substrate state at pause
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- Fork tip `692eaa0` (Phase 7 fix-forward) — on noether + fresnel.
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- Backend `.so` installed on fresnel.
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- Phase 3 anchor + Phase 7 fixed-strace files persisted on fresnel `/tmp/iter4_phase{3,7}/`.
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- Memory rules carry forward.
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- iter4 commits chain: Z (`7f8fa93`) -> A (`16b3973`) -> B (`406d08e`) -> C (`beaa914`) -> Phase-7 fix (`692eaa0`).
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## Resume cue
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When fresnel surfaces, continue from: byte-by-byte diff of FRAME + COMPRESSED_HDR controls vs Phase 3 anchor + ffmpeg-v4l2request VP9 hwdownload pixel comparison.
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