marfrit/rk3588-ddr-analysis
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rk3588-ddr-analysis/mmio_trace.csv
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test0r a93ce6c3e9 Add instrumented MMIO tracer and first trace 
Unicorn-based tracer captures every MMIO read/write with PC and instruction count.
First trace of trampoline blob: 19 MMIO accesses in 200K instructions.

Boot sequence: PMU_GRF read -> SRAM flag -> SRAM self-register ->
BUS_GRF QoS -> DDRC reset -> SCRU PLL config -> BUS_GRF route -> polls

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
2026-04-03 23:16:32 +02:00

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1instropaddrregistervaluepc
213R0xFD588080GRF+0x80800x000000000x109A0
317R0xFF000010SRAM+0x100x000000000x109B0
439W0xFF016F58SRAM+0x16F580x-5640EC1FEBFFFFFF0x00B14
545W0xFF016F60SRAM+0x16F600x58000164A9BF7BFD0x00B14
651W0xFF016F68SRAM+0x16F680x-6D87A3FF6BFFFFF90x00B14
757W0xFF016F70SRAM+0x16F700x54000001EB04001F0x00B14
877R0xFF000010SRAM+0x100x000000000x009A8
984W0xFD5F8098BUS_GRF+0x80980xFF0055000x009C4
1087W0xFE0100F0DDRC+0xF00x000000000x009D0
1188W0xFE0100F4DDRC+0xF40x000000000x009D4
1289W0xFE0100F8DDRC+0xF80x000000000x009D8
1390W0xFE0100FCDDRC+0xFC0x000000000x009DC
14109W0xFD8C8004SCRU+0x80040x000000000x10A8C
15114W0xFD8C8014SCRU+0x80140xFFFFFFFF0x10AA0
16115W0xFD8C8018SCRU+0x80180xFFFFFFFF0x10AA4
17118W0xFD8C8008SCRU+0x80080x000000000x10AB0
18121W0xFD8C8004SCRU+0x80040x000000010x10ABC
19151W0xFD5F4000BUS_GRF+0x40000x0FF008800x00660
20154W0xFD5F800CBUS_GRF+0x800C0x0FF00AA00x0066C
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