test0r
a93ce6c3e9
Unicorn-based tracer captures every MMIO read/write with PC and instruction count. First trace of trampoline blob: 19 MMIO accesses in 200K instructions. Boot sequence: PMU_GRF read -> SRAM flag -> SRAM self-register -> BUS_GRF QoS -> DDRC reset -> SCRU PLL config -> BUS_GRF route -> polls Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
21 lines
966 B
CSV
21 lines
966 B
CSV
instr,op,addr,register,value,pc
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13,R,0xFD588080,GRF+0x8080,0x00000000,0x109A0
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17,R,0xFF000010,SRAM+0x10,0x00000000,0x109B0
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39,W,0xFF016F58,SRAM+0x16F58,0x-5640EC1FEBFFFFFF,0x00B14
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45,W,0xFF016F60,SRAM+0x16F60,0x58000164A9BF7BFD,0x00B14
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51,W,0xFF016F68,SRAM+0x16F68,0x-6D87A3FF6BFFFFF9,0x00B14
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57,W,0xFF016F70,SRAM+0x16F70,0x54000001EB04001F,0x00B14
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77,R,0xFF000010,SRAM+0x10,0x00000000,0x009A8
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84,W,0xFD5F8098,BUS_GRF+0x8098,0xFF005500,0x009C4
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87,W,0xFE0100F0,DDRC+0xF0,0x00000000,0x009D0
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88,W,0xFE0100F4,DDRC+0xF4,0x00000000,0x009D4
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89,W,0xFE0100F8,DDRC+0xF8,0x00000000,0x009D8
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90,W,0xFE0100FC,DDRC+0xFC,0x00000000,0x009DC
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109,W,0xFD8C8004,SCRU+0x8004,0x00000000,0x10A8C
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114,W,0xFD8C8014,SCRU+0x8014,0xFFFFFFFF,0x10AA0
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115,W,0xFD8C8018,SCRU+0x8018,0xFFFFFFFF,0x10AA4
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118,W,0xFD8C8008,SCRU+0x8008,0x00000000,0x10AB0
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121,W,0xFD8C8004,SCRU+0x8004,0x00000001,0x10ABC
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151,W,0xFD5F4000,BUS_GRF+0x4000,0x0FF00880,0x00660
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154,W,0xFD5F800C,BUS_GRF+0x800C,0x0FF00AA0,0x0066C
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