marfrit
24adc74812
Codename: Frank Rosenblatt — Mark I Perceptron 1958, the first
hardware neural network. This project lights up the RK3588 NPU on
mainline Linux so the OSS world finally owns the silicon-side of
inference on that chip.
Phase-1 scope: small LLM running CPU + NPU mix on boltzmann (Rock 5
ITX+). Backend: llama.cpp with a new rknpu ggml backend offloading
INT8 GEMM (attention + FFN matmuls) to the NPU's tile-MAC array while
leaving dequant / RoPE / softmax / sampling / embedding on A76 NEON.
Target model: qwen2.5-1.5B-instruct Q4_K_M GGUF.
Scaffold layout: README.md (frame + 9+1-phase plan), TODO.md (rolling
punch-list), docs/{npu-mainline-status,architecture}.md, kernel/ for
DT bindings + driver tweaks, userspace/{npu-probe,llm-runtime}/,
fleet/boltzmann.yaml.
Next: Phase-1 substrate audit — fill the TBDs in docs/npu-mainline-status.md
with the actual state of Tomeu Vizoso's rknpu / DRM-accel work on
the boltzmann-running kernel.
76 lines
3.0 KiB
Markdown
76 lines
3.0 KiB
Markdown
# TODO — Rosenblatt
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Rolling punch-list. Older items at bottom (move done → DONE.md when noisy).
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---
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## Phase 1 — substrate audit
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- [ ] On boltzmann: `uname -r` → record in `fleet/boltzmann.yaml:kernel.running_version`
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- [ ] `find / -path '*accel*' -name '*.ko' 2>/dev/null` — check if accel framework is built
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- [ ] `ls /dev/accel/ /dev/dri/` — what's exposed?
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- [ ] `lsmod | grep -iE 'rknpu|accel'` — what's loaded?
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- [ ] `dmesg | grep -iE 'rknpu|npu|accel'` since boot — driver bringup log
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- [ ] Tomeu's rknpu series — find on lore.kernel.org/dri-devel, capture latest
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patch-set version + state (merged / in-review / dropped) → fill table in
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`docs/npu-mainline-status.md`
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- [ ] Check `drivers/accel/` in current torvalds tree — list in-tree
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accelerators, confirm rknpu's mainline state
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- [ ] Check DT bindings: `Documentation/devicetree/bindings/npu/rockchip,*.yaml`
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- [ ] Inspect `arch/arm64/boot/dts/rockchip/rk3588.dtsi` for `npu` node
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- [ ] If a userspace shim exists (rkneural?), capture repo URL + try
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hello-world against the running kernel
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- [ ] Spec-extract from BSP vendor `rockchip-npu` source — register map,
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DMA descriptor format, irq handling. No code lift; spec only.
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Phase exit criteria: `docs/npu-mainline-status.md` table fully populated;
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clear answer to "do we drive via accel uAPI or write our own MMIO driver."
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---
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## Phase 2 — formulate
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- [ ] List llama.cpp ops by wallclock %, profiling qwen-1.5B Q4_K_M on CPU
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(use llama.cpp's built-in perf-timer or perf record)
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- [ ] Pick the exact INT8 matmul tile size the NPU prefers (read from BSP source)
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- [ ] Spec out the smallest backend interface: which ops we MUST handle,
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which the framework falls back to CPU
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- [ ] Write `docs/op-coverage.md`
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---
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## Phase 3 — analyze
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- [ ] RKNPU2 SDK: trace through `librknnrt.so` user-API → kernel ioctl shapes
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(objdump + strings, no actual reverse-engineering of vendor blob — just
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the syscall surface)
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- [ ] Tomeu's accel uAPI: read driver source, understand:
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- submit-job ioctl shape
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- dmabuf import path
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- fence-wait mechanism
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- error reporting
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- [ ] BSP vendor `rockchip-npu` source: register layout, DMA descriptor
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struct, irq handling sequence
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---
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## Phase 4 — baseline
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- [ ] Build vanilla llama.cpp on boltzmann (mainline branch)
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- [ ] Pull qwen2.5-1.5b-instruct Q4_K_M GGUF
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- [ ] `llama-bench -m qwen2.5-1.5b -p 512 -n 128` × 3 runs
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- [ ] Capture JSON to `benchmarks/$(date +%F)_boltzmann_qwen1.5b_cpu_baseline.json`
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- [ ] Record into `fleet/boltzmann.yaml:baseline_measurement`
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---
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## Cross-phase / standing items
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- [ ] Mirror Tomeu's WIP branch into a local clone for kernel hacking
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- [ ] Set up serial console on boltzmann for kernel-panic recovery (Quark
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umbrella; check current state)
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- [ ] Add `project_rosenblatt.md` to claude-memory once Phase 1 closes (so
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future sessions don't re-discover the campaign)
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- [ ] Decide repo home: marfrit/rosenblatt on git.reauktion.de (probably yes,
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after Phase-1 substrate is captured and the README isn't embarrassing)
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