marfrit
c9a3f5c600
Phase-1 audit closes with a substantively different picture than the original scaffold's TBDs: - Tomeu Vizoso's RK3588 NPU work merged in Linux 6.18 (Nov 2025) under codename `rocket` (NOT `rknpu`). All references updated. - Boltzmann's `linux-rk3588-marfrit-A1` (7.0.0-rc3-ARCH+) already ships `drivers/accel/rocket/rocket.ko` as a built-but-not-loaded module. - DT bindings + per-core nodes (`npu@fdab/c/d_0000`, compatible `rockchip,rk3588-rknn-core`) in mainline since 6.18 but ship `status = "disabled"` — board enable is the Phase-2 unblock, not a driver port. - Mesa 25.3 ships Rocket Gallium + Teflon TFLite delegate as the authoritative userspace reference for the uAPI shape. - Op coverage today is conv-centric (MobileNet-class); transformer matmul needs the conv-1×1 shoehorn (RKNPU2 BSP precedent) or rocket op-set additions. Surfaced as Phase-2-load-bearing risk. - IOMMU v1.0 hazard: 32 GB host needs `mem=4G` or local `rockchip,rk3568-iommu-v1` discriminator patches before the first NPU job, to avoid DMA-window faults. Files: - docs/npu-mainline-status.md: full audit table with upstream pointers (kernel.org / Mesa docs / dri-devel patch URLs / Tomeu's "we are in mainline" blog post). - docs/phases.md: per-phase log entry for Phase-1 closeout. - docs/op-coverage.md: matmul-vs-conv-vs-rocket-op-set framing. - fleet/boltzmann.yaml: audited kernel + npu_driver + dt_npu_nodes state. - kernel/dt-overlays/rk3588-rosenblatt-npu-enable.dtso: overlay to flip the three rknn-core nodes to "okay" (+ matching mmu nodes), carries the IOMMU-mitigation warning inline. - kernel/README.md: kernel-agent scope wiring + anticipated local carry patches. - README.md: phase-status table + "rknpu → rocket" rename note. - TODO.md: Phase-2 unblock concrete steps + standing upstream-watch items.
55 lines
1.3 KiB
Plaintext
55 lines
1.3 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Rosenblatt: enable all three RK3588 RKNN cores + their IOMMUs.
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*
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* Apply on top of any rk3588 board DT that uses the mainline
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* rk3588-base.dtsi labels. Verified against boltzmann
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* (model "Radxa ROCK 5 ITX", compatible "radxa,rock-5-itx").
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*
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* Pre-conditions before applying on a system with >4 GB RAM
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* (boltzmann has 32 GB):
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* - The IOMMU v1.0 hazard MUST be mitigated first.
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* See docs/npu-mainline-status.md "IOMMU v1.0 hazard".
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* Either boot with `mem=4G`, OR carry the discriminator-compat
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* patch series (Simon Xue per-device-ops +
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* Midgy BALON `rockchip,rk3568-iommu-v1`).
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*
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* After applying:
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* - `modprobe rocket`
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* - expect `/dev/accel/accel0` (single facade, schedules across cores)
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* - dmesg: rocket-driven probe per `npu@fdab0000`, `..fdac0000`,
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* `..fdad0000`
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*
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* Keep the assigned-clock-rate at the rk3588-base.dtsi default of
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* 200 MHz for first-bringup. Lift to 1 GHz (`SCMI_CLK_NPU` max) only
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* after the rocket bringup, IOMMU, and a baseline matmul are
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* verified stable.
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*/
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/dts-v1/;
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/plugin/;
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&rknn_core_0 {
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status = "okay";
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};
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&rknn_mmu_0 {
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status = "okay";
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};
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&rknn_core_1 {
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status = "okay";
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};
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&rknn_mmu_1 {
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status = "okay";
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};
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&rknn_core_2 {
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status = "okay";
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};
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&rknn_mmu_2 {
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status = "okay";
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};
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