claude-noether
1d805ef70d
After verifying the minimal v7.0-rc3+pwm15+pwm-fan+RK806 baseline boots with display on ampere, extended via bisect-by-addition to include 3 more from linux-rk3588-marfrit's pre-cherry-pick set: 0004 enable speaker output (genbook dts + cm5 dtsi) 0005 USB-C PD charging (genbook dts: FUSB302, vcc5v0_otg) 0006 lid switch + USB3 lane mux (genbook dts: gpio-keys SW_LID, usbdp_phy1) ampere-minimal-devices branch on git.reauktion.de/marfrit/linux-rk3588-marfrit @ 7c241f2e2835 = the verified-working state with all 6 patches. Display continues to work — confirms regression source is in one of the 12 remaining linux-rk3588-marfrit commits (Shawn Lin pcie3 phy series, Cristian Ciocaltea clk/dts/dw-dp, Sebastian Reichel hdmirx, Pedro Alves btrtl, plus the WIP suspend/resume patch 0010). Generated-by: Claude Opus 4.7 <claude@reauktion.de>
101 lines
3.3 KiB
Diff
101 lines
3.3 KiB
Diff
From 7c241f2e28353aa2256682993d2546b96883ae27 Mon Sep 17 00:00:00 2001
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From: Markus Fritsche <mfritsche@localhost>
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Date: Tue, 24 Mar 2026 00:00:00 +0000
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Subject: [PATCH 6/6] arm64: dts: rockchip: rk3588-coolpi-cm5-genbook: add lid
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switch and USB3 PHY lane config
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The GenBook laptop has two features missing from the mainline DTS:
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1. Lid switch (MH248 hall-effect sensor on GPIO0_PB0)
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The lid state is reported via a gpio-keys node using SW_LID / EV_SW.
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The GPIO is active-low (low = lid closed) and pulled up.
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wakeup-source is set so that opening the lid can wake the system from
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suspend. A sensor pinctrl group is added for the GPIO configuration.
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2. usbdp_phy1 lane mux (rockchip,dp-lane-mux = <2 3>)
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The RK3588 usbdp_phy1 is a combo USB3 + DisplayPort PHY shared between
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the USB3 host1 port (USB-A connector) and the DisplayPort output on the
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GenBook board. Lanes 0+1 carry USB3 SuperSpeed to the USB-A socket;
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lanes 2+3 are routed to the DP connector.
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Without this property the phy-rockchip-usbdp driver selects
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UDPHY_MODE_USB and configures all four lanes as USB3. That conflicts
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with the physical routing on this board: lanes 2+3 are not connected to
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the USB-A socket, so the 4-lane USB3 training fails silently and the
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USB3 host1 DWC3 controller (usb_host1_xhci) cannot enumerate devices.
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Setting rockchip,dp-lane-mux = <2 3> restricts USB3 to lanes 0+1,
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matching the physical wiring, and enables correct SuperSpeed operation
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on the USB-A port.
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The USB2 EHCI host1 controller (usb_host1_ehci) shares the USB power
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domain with usb_host1_xhci. A stalled USB3 DWC3 probe can delay
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power-domain activation in a way that prevents the EHCI hub (which
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carries the integrated webcam) from being enumerated. With the correct
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lane mux both controllers probe cleanly and the webcam is detected.
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Generated-by: Claude Sonnet 4.6 <noreply@anthropic.com>
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Signed-off-by: Markus Fritsche <mfritsche@localhost>
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---
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.../rockchip/rk3588-coolpi-cm5-genbook.dts | 23 +++++++++++++++++++
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1 file changed, 23 insertions(+)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts
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index 7c577a603cb5..e3954851b0cb 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts
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@@ -8,6 +8,7 @@
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/soc/rockchip,vop2.h>
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+#include <dt-bindings/input/linux-event-codes.h>
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#include <dt-bindings/usb/pd.h>
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#include "rk3588-coolpi-cm5.dtsi"
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@@ -166,6 +167,21 @@ vcc5v0_otg: regulator-vcc5v0-otg {
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pinctrl-0 = <&typec5v_pwren>;
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vin-supply = <&vcc5v0_sys>;
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};
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+
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+ gpio-key-lid {
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+ compatible = "gpio-keys";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&mh248_irq_gpio>;
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+
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+ lid {
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+ debounce-interval = <20>;
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+ gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>;
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+ label = "Lid";
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+ linux,code = <SW_LID>;
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+ linux,input-type = <EV_SW>;
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+ wakeup-source;
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+ };
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+ };
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};
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&edp1 {
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@@ -431,6 +447,12 @@ pcie_wake: pcie-wake {
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rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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+
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+ sensor {
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+ mh248_irq_gpio: mh248-irq-gpio {
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+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
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+ };
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+ };
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};
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&pwm6 {
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@@ -512,6 +534,7 @@ &u2phy3_host {
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};
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&usbdp_phy1 {
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+ rockchip,dp-lane-mux = <2 3>;
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status = "okay";
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};
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--
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2.54.0
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