24adc74812
Codename: Frank Rosenblatt — Mark I Perceptron 1958, the first
hardware neural network. This project lights up the RK3588 NPU on
mainline Linux so the OSS world finally owns the silicon-side of
inference on that chip.
Phase-1 scope: small LLM running CPU + NPU mix on boltzmann (Rock 5
ITX+). Backend: llama.cpp with a new rknpu ggml backend offloading
INT8 GEMM (attention + FFN matmuls) to the NPU's tile-MAC array while
leaving dequant / RoPE / softmax / sampling / embedding on A76 NEON.
Target model: qwen2.5-1.5B-instruct Q4_K_M GGUF.
Scaffold layout: README.md (frame + 9+1-phase plan), TODO.md (rolling
punch-list), docs/{npu-mainline-status,architecture}.md, kernel/ for
DT bindings + driver tweaks, userspace/{npu-probe,llm-runtime}/,
fleet/boltzmann.yaml.
Next: Phase-1 substrate audit — fill the TBDs in docs/npu-mainline-status.md
with the actual state of Tomeu Vizoso's rknpu / DRM-accel work on
the boltzmann-running kernel.
25 lines
889 B
Markdown
25 lines
889 B
Markdown
# kernel/
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Mainline-bound kernel patches: DT bindings, rknpu driver tweaks,
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power-domain wiring for boltzmann's `rk3588-rock-5-itx-plus.dts`.
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Empty until Phase 1 audit identifies what's actually missing in mainline.
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If Tomeu Vizoso's rknpu series is far enough along to use as-is, this
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directory may stay nearly empty — we'd just carry a small DT-overlay
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patch for boltzmann's board file.
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If we end up writing a driver from scratch (worst case), the structure
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will mirror an upstream submission layout:
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```
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0001-dt-bindings-npu-add-rockchip-rk3588-npu.patch
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0002-arm64-dts-rockchip-rk3588-add-npu-node.patch
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0003-arm64-dts-rockchip-rock-5-itx-plus-enable-npu.patch
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0004-accel-rknpu-add-rockchip-rk3588-driver.patch
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...
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```
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Tracking-wise these go through `marfrit/kernel-agent` as scope
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`patches/driver/accel/rknpu/`, with `fleet/boltzmann-rosenblatt.yaml`
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as the consuming manifest.
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