claude-noether
a6549605f0
Brings the second customized fleet host into kernel-agent's scope-tagged tree. Sibling PR coming in marfrit-packages with the arch/linux-ampere-fourier/ PKGBUILD + flat patch + config + extlinux hook (build-tree-ready form). Issue #6 ask #1 only — VP9 enablement (ask #2) and AV1 dec integration (ask #3) are explicitly deferred to a separate session per the user's direction. The ampere.yaml manifest documents what's excluded and why. ## Patches promoted Six patches from boltzmann:~/src/misc_patches/genbook/kernel/ get scope-tagged into kernel-agent's tree: soc/rockchip/rk3588/ 0001-...Add-pwm15-pinctrl-entries.patch (prereq for 0002) module/coolpi-cm5/ 0003-...Fix-power-off-by-enabling-RK806-as-system-power-controller.patch board/coolpi-cm5-genbook/ 0002-...Add-pwm-fan.patch 0004-...Enable-speaker-output-via-audio-graph-card.patch 0005-...Enable-USB-C-PD-charging-via-FUSB302.patch 0008-...Add-lid-switch-and-USB3-PHY-lane-config.patch Each new scope dir gets a README.md documenting what it carries and why the scope-level granularity makes sense (pwm15 is SoC-wide, RK806 power-off is SoM-level not board-level, the rest are board-specific GenBook quirks). Note on uncommitted-modifications flag in issue body: patches 0001-0004 have working-tree-only changes in misc_patches that fix malformed 'From: PATCH 000X/000Y' headers (placeholder text instead of an RFC-2822 author identity). The working-tree versions with proper 'From: Markus Fritsche <mfritsche@localhost>' headers are what we ship here — the unfixed-on-disk variants would fail patch -i header parsing on stricter implementations and are user-side cleanup that hasn't been committed back to misc_patches yet. Markus can commit the cleanup to that personal repo separately; this PR's ingestion does not depend on it. Patches 0006 (HAVE_GCC_PLUGINS Kconfig), 0009 (Bluetooth btrtl), 0010 (multi-driver suspend/wakeup) from the misc_patches series are intentionally NOT promoted here — they need different scope tags (arch/arm64/, driver/bluetooth/, soc/rockchip/rk3588/ + driver/ split) and will follow when their respective campaigns demand them. The ampere.yaml manifest documents the explicit-defer for each. ## fleet/ampere.yaml manifest Same shape as fleet/fresnel.yaml. Baseline pinned at marfrit/linux-rockchip branch linux-rk3588-marfrit @ f8f3ad934433 (the working tree on boltzmann; 18 commits ahead of v7.0-rc3, current 2026-05-15 tip). Six scope-tagged patch includes per the apply-order in the package (pwm15 pinctrl must precede the pwm-fan node consumer). ## ampere-specific bootloader path Documented in manifest. ampere boots from /boot/firmware/ (vfat partition on mmcblk0p1), not /boot/ (root partition) like fresnel. The marfrit-packages PKGBUILD's extlinux-add hook needs to write to /boot/firmware/extlinux/extlinux.conf, not /boot/extlinux/. ## ampere as 2nd aarch64 build host Per the README update in PR #7, ampere is now a secondary aarch64 build host. The manifest's build_host: section pins ampere as self-hosting primary for its own kernel, with boltzmann as secondary and fermi as fallback. This is the first manifest that has its own host listed as the primary build target — not ideologically pretty, but pragmatic: native arch, same uarch, full RAM, no cross-compile step, no need to wake another host.
53 lines
1.2 KiB
Diff
53 lines
1.2 KiB
Diff
From: Markus Fritsche <mfritsche@localhost>
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Subject: [PATCH 1/2] arm64: dts: rockchip: rk3588: Add pwm15 pinctrl entries
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Add pinctrl entries for all four mux options of the RK3588 pwm15
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controller (m0-m3) to rk3588-extra-pinctrl.dtsi, marked with
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/omit-if-no-ref/ so they are only compiled in when referenced.
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Generated-by: Claude Sonnet 4.6 <noreply@anthropic.com>
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Signed-off-by: Markus Fritsche <mfritsche@reauktion.de>
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---
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1 file changed, 30 insertions(+)
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--- a/arch/arm64/boot/dts/rockchip/rk3588-extra-pinctrl.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3588-extra-pinctrl.dtsi
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@@ -342,6 +342,36 @@
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};
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};
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+ pwm15 {
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+ /omit-if-no-ref/
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+ pwm15m0_pins: pwm15m0-pins {
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+ rockchip,pins =
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+ /* pwm15_ir_m0 */
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+ <3 RK_PC3 11 &pcfg_pull_none>;
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+ };
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+
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+ /omit-if-no-ref/
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+ pwm15m1_pins: pwm15m1-pins {
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+ rockchip,pins =
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+ /* pwm15_ir_m1 */
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+ <4 RK_PB3 11 &pcfg_pull_none>;
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+ };
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+
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+ /omit-if-no-ref/
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+ pwm15m2_pins: pwm15m2-pins {
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+ rockchip,pins =
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+ /* pwm15_ir_m2 */
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+ <1 RK_PC6 11 &pcfg_pull_none>;
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+ };
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+
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+ /omit-if-no-ref/
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+ pwm15m3_pins: pwm15m3-pins {
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+ rockchip,pins =
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+ /* pwm15_ir_m3 */
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+ <1 RK_PD7 11 &pcfg_pull_none>;
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+ };
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+ };
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+
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sdio {
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/omit-if-no-ref/
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sdiom0_pins: sdiom0-pins {
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